2.9 Programmable Dead Time and Overlap Protection

All high-side/low-side drivers and PWM drivers (single input) include programmable dead time, which adds a user-programmable delay

between transitions of VOA and VOB. When asserted, dead time is present only on output rising edges, when the other input is

also high. If only one input is high, there is no dead time added to the output transition. Please see figure below for a graphical

representation of dead time implementation. The amount of dead time delay (DT) is programmed by a single resistor (RDT) connected

from the DT input to ground per the equation below. The DT is measured as the time elapsed between VOA low to VOB high and vice

versa.

For products with Dead Time setting of 20-200ns:

DT ~ 1.8 x (RDT) + 12, where DT = Typical Dead Time in ns, RDT = Dead Time Resistor in kΩ

VIA

VIB

VOA

VOB

Pulse 1 edges

have no DT

(VIB = low)

Pulse 1

Pulse 2

Pulse 3

Pulse 2 is

missing

(VIB = high)

DT present to

ensure VOB = low

before VOA = high

No DT

(VIA = low)

No DT since immediate

turn-off is required

(VIA = VIB = high)

DT present to

ensure VOA = low

before VOB = high

DT present to

ensure VOA = low

before VOB = high

Figure 2.6. Dead Time Implementation and Behavior

VIA/

PWM

VIB

VOA

VOB

DT

10%

90%

DT

10%

90%

Figure 2.7. Dead Time Waveforms for High-Side/Low-Side Drivers

Si823Hx Data Sheet • System Overview

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

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206414A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 1, 2022

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