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UPD78F0974 bảng dữ liệu(PDF) 14 Page - Renesas Technology Corp |
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UPD78F0974 bảng dữ liệu(HTML) 14 Page - Renesas Technology Corp |
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14 / 42 page ![]() 12 µPD78F0974 Preliminary Product Information U12646EJ2V1PM00 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins The input/output circuit type of each pin and recommended connection of unused pins are shown in Table 2-1. For the input/output circuit configuration of each type, see Figure 2-1. Table 2-1. Input/Output Circuit Type of Each Pin Pin Name Input/output I/O Recommended Connection When Not Used Circuit Type P00/INTP0-P02/INTP2 8-A Input/output Independently connect to VSS through resistor. P03 to P07 P10/ANI0 to P14/ANI4 9 Input Independently connect to VDD or VSS through resistor. P20/SM11 to P23/SM14 4 Output Leave open. P24/SM21 to P27/SM24 P30/SM31 to P33/SM34 P34/SM41 to P37/SM44 P40/TI00 to P42/TI02 8 Input/output Independently connect to VDD or VSS through P43/TIO2 resistor. P44/TIO3 P50/SCK P51/SO 5 P52/SI 8 P53/RxD P54/TxD 5 P60/SGOA/PCL P61/SGO/SGOF P81/S19/TPO 17-G P82/S18 to P87/S13 P90/S12 to P97/S5 S0-S4 17 Output Leave open. COM0 to COM3 18 VLCD –– RESET 2 Input Connect to VDD. SMVDD –– SMVSS Connect to VSS. AVREF AVSS VPP Directly connect to VSS. |
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