ST72340 datasheet(147/191 Pages) STMICROELECTRONICS

147 / 191 page

ST72340, ST72344, ST72345

147/191

ST7 ADDRESSING MODES (Cont’d)

12.1.1 Inherent

All Inherent instructions consist of a single byte.

The opcode fully specifies all the required informa-

tion for the CPU to process the operation.

12.1.2 Immediate

Immediate instructions have 2 bytes, the first byte

contains the opcode, the second byte contains the

operand value.

12.1.3 Direct

In Direct instructions, the operands are referenced

by their memory address.

The direct addressing mode consists of two sub-

modes:

Direct (Short)

The address is a byte, thus requires only 1 byte af-

ter the opcode, but only allows 00 - FF addressing

space.

Direct (Long)

The address is a word, thus allowing 64 Kbyte ad-

dressing space, but requires 2 bytes after the op-

code.

12.1.4 Indexed (No Offset, Short, Long)

In this mode, the operand is referenced by its

memory address, which is defined by the unsigned

addition of an index register (X or Y) with an offset.

The indirect addressing mode consists of three

submodes:

Indexed (No Offset)

There is no offset (no extra byte after the opcode),

and allows 00 - FF addressing space.

Indexed (Short)

The offset is a byte, thus requires only 1 byte after

the opcode and allows 00 - 1FE addressing space.

Indexed (Long)

The offset is a word, thus allowing 64 Kbyte ad-

dressing space and requires 2 bytes after the op-

code.

12.1.5 Indirect (Short, Long)

The required data byte to do the operation is found

by its memory address, located in memory (point-

er).

The pointer address follows the opcode. The indi-

rect addressing mode consists of two submodes:

Indirect (Short)

The pointer address is a byte, the pointer size is a

byte, thus allowing 00 - FF addressing space, and

requires 1 byte after the opcode.

Indirect (Long)

The pointer address is a byte, the pointer size is a

word, thus allowing 64 Kbyte addressing space,

and requires 1 byte after the opcode.

Inherent Instruction

Function

NOP

No operation

TRAP

S/W Interrupt

WFI

Wait For Interrupt (Low Power

Mode)

HALT

Halt Oscillator (Lowest Power

Mode)

RET

Subroutine Return

IRET

Interrupt Subroutine Return

SIM

Set Interrupt Mask

RIM

Reset Interrupt Mask

SCF

Set Carry Flag

RCF

Reset Carry Flag

RSP

Reset Stack Pointer

Load

CLR

Clear

PUSH/POP

Push/Pop to/from the stack

INC/DEC

Increment/Decrement

TNZ

Test Negative or Zero

CPL, NEG

1 or 2 Complement

MUL

Byte Multiplication

SLL, SRL, SRA, RLC,

RRC

Shift and Rotate Operations

SWAP

Swap Nibbles

Immediate Instruction

Function

Load

Compare

BCP

Bit Compare

AND, OR, XOR

Logical Operations

ADC, ADD, SUB, SBC

Arithmetic Operations

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