CS5535-UDC datasheet(43/555 Pages) NSC

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Signal Definitions (Continued)

Note 3.

Applications incorporating a CRT often require support for the Display Data Channel (DDC) serial interface. These particular

GPIOs have open collector SMB I/O buffer types required by the DDC interface specification. The DDC protocol supplied by Na-

tional is provided via software implementation and defaults to these GPIOs. However, any design not needing strict DDC electrical

support can use other GPIOs. Lastly, applications not incorporating DDC use at all may use these GPIOs without restriction.

Note 4.

Internal signal is active high. Use GPIO invert for active low external.

Note 5.

When both AUX_IN and AUX_OUT are enabled, I/O direction on this ball is controlled by the SMB Controller.

Note 6.

Defaults to LPC use. Use Ball Options MSR (see Table 2-6 on page 29) to switch this ball to GPIO control.

Note 7.

Any GPIO can be used as a Power Management Event (PME) wakeup input without restriction. PMEs are supported for both

Sleep and Standby wakeup. However, if Standby wakeup is desired, a GPIO on the Standby power domain must be used. Only

GPIO[24:28] are supplied via the Standby Power Rail and are typically used as follows:

GPIO24 - Auxiliary Working Power Control

GPIO25 - Low Battery Alarm

GPIO26 - PME

GPIO27 - MFGPT setup to provide a blink

GPIO28 - Power Button

Depending on application use, the PME function could be moved to GPIO[24:27]. If only external PME wakeup from Sleep is

required, the PME function could be moved to GPIO[0:23]. Lastly, the PME function could simply not be used, making more

GPIOs available for other uses.

Note 8.

GPIOH_IN_EN (GPIO Offset A0h) and GPIOH_IN_AUX1_SEL (GPIO Offset B4h) are enabled.

Note 9.

Reset default.

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