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L6726ATR bảng dữ liệu(PDF) 15 Page - STMicroelectronics |
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L6726ATR bảng dữ liệu(HTML) 15 Page - STMicroelectronics |
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15 / 24 page ![]() L6726A Application details 15/24 8 Application details 8.1 Output voltage selection L6726A is capable to precisely regulate an output voltage as low as 0.8V. In fact, the device comes with a fixed 0.8V internal reference that guarantees the output regulated voltage to be within ±1% tolerance over line and temperature variations (excluding output resistor divider tolerance, when present). Output voltage higher than 0.8V can be achieved by adding a resistor ROS between FB pin and ground. Referring to Figure 1, the steady state DC output voltage will be: where VREF is 0.8V. 8.2 Compensation network The control loop shown in Figure 8 is a voltage mode control loop. The error amplifier is a transconductance type with fixed gain (3.3mS typ.). The FB voltage is regulated to the internal reference, thus the output voltage is fixed accordingly to the output resistor divider (when present). Transconductance error amplifier output current generates a voltage across ZF, which is compared to oscillator saw-tooth waveform to provide PWM signal to the driver section. PWM signal is then transferred to the switching node with VIN amplitude. This waveform is filtered by the output filter. Figure 8. PWM control loop The converter transfer function is the small signal transfer function between the voltage at the output node of the EA (COMP) and VOUT. This function has a double pole (complex conjugate) at frequency FLC depending on the L-COUT resonance and a zero at FESR V OUT V REF 1 R FB R OS ----------- + ⎝⎠ ⎛⎞ ⋅ = L R C OUT ESR R FB OSC V IN ∆VOSC + + _ _ V OUT V REF ZF OUTPUT DIVIDER PWM COMPARATOR OTA R F C F C P ROS FB COMP |
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