LTC4270 datasheet(30/34 Pages) AD

30 / 34 page

Data Sheet

LTC9101-2A/LTC9102

APPLICATIONS INFORMATION

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Rev. 0 | 30 of 34

Figure 45. LTC9102 Surge Protection

Table 14. Component Selection for PSE Maximum Class

PSE CLASS

SENSE RESISTOR

HOT SWAP MOSFET

FUSE

ETHERNET TRANSFORMER

Class 3

100mΩ, 1%, 50mW

PSMN075-100MSE

SF-0603HI075F-2

7490220120

Class 4

100mΩ, 1%, 100mW

PSMN075-100MSE

SF-0603HI100F-2

7490220121

LAYOUT REQUIREMENTS

Strict adherence to board layout, parts placement, and routing

requirements is critical for IEEE compliance, parametric measure-

ment accuracy, system robustness, and thermal dissipation. Refer

to the DC3160A-KIT demo kit for example layout references.

Kelvin Sense

Proper connection of the port current Kelvin sense lines is important

for current threshold accuracy and IEEE compliance. See Figure 46

for an example layout of these Kelvin sense lines. The LTC9102

VSSKn pin is Kelvin connected to the sense resistor (VEE side) pad

and is not otherwise connected to VEE copper areas. Similarly, the

LTC9102 SENSEn pin is Kelvin connected to the sense resistor

(SENSEn side) pad and is not otherwise connected in the power

path. Figure 46 shows the two Kelvin traces from the LTC9102 to

the sense resistor (RSENSEn).

High-Speed Data Interface Layout

The LTC9101-2A/LTC9102 chipset communicates across a propri-

etary high-speed, multidrop data interface. This allows for a single

LTC9101-2A to control up to four LTC9102s.

Figure 46. RSENSE Kelvin Connections

The data-lines require impedance matched traces to each

LTC9102. The data bus termination resistors must be located at the

LTC9102 farthest away from the isolation transformers. For isolated

applications, the DC biasing resistors must connect to the LTC9102

CAP3 pin farthest away from the isolation transformers. Figure 43

and Figure 44 show how to design the interface with 100Ω differen-

tial transmission lines, and terminate 100Ωs differentially. Limit the

high-speed data interface line length to 20 inches. Minimize the

transmission stubs between the LTC9102s and the high-speed data

interface.

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