Data Sheet
February 1997
ATT3000 Series Field-Programmable Gate Arrays
Lucent Technologies Inc.
13
Programmable Interconnect (continued)
Long Lines
The long lines bypass the switch matrices and are
intended primarily for signals which must travel a long
distance, or must have minimum skew among multiple
destinations. Long lines, shown in Figure 13, run
vertically and horizontally the height or width of the
interconnect area. Each interconnection column has
three vertical long lines, and each interconnection row
has two horizontal long lines. Additionally, two long
lines are located adjacent to the outer sets of switching
matrices. Two vertical long lines in each column are
connectable half-length lines, except on the ATT3020,
where only the outer long lines serve that function.
Long lines can be driven by a logic block or IOB output
on a column-by-column basis. This capability provides
a common low-skew control or clock line within each
column of logic blocks. Interconnections of these long
lines are shown in Figure 14. Isolation buffers are pro-
vided at each input to a long line and are enabled auto-
matically by the development system when a
connection is made.
Figure 13. Horizontal and Vertical Long Lines in the FPGA
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