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CS4350 bảng dữ liệu(PDF) 26 Page - Cirrus Logic

tên linh kiện CS4350
Giải thích chi tiết về linh kiện  192 kHz Stereo DAC with Integrated PLL
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CS4350 bảng dữ liệu(HTML) 26 Page - Cirrus Logic

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DS691A3
CS4350
6.3.2
SPI Read
To read from the device, follow the procedure below while adhering to the values specified in ”Switching
Characteristics - Control Port - SPI Format” on page 14.
1.
Bring CS low.
2.
The address byte on the CDIN pin must then be 10011111 (R/W =1).
3.
CDOUT pin will then output the data from the register pointed to by the MAP, which is set during the
SPI write operation.
4.
If the INCR bit (see Section 6.1) is set to 1, keep CS low and continue providing clocks on CCLK to
read from multiple consecutive registers. Bring CS high when reading is complete.
5.
If the INCR bit is set to 0 and further SPI reads from other registers are desired, it is necessary to bring
CS high, and follow the procedure detailed from step 1. If no further reads from other registers are
desired, bring CS high.
6.4
Memory Address Pointer (MAP)
6.4.1
INCR (Auto Map Increment Enable)
Default = ‘0’
0 - Disabled
1 - Enabled
6.4.2
MAP (Memory Address Pointer)
Default = ‘0000’
76543210
INCR
Reserved
Reserved
Reserved
MAP3
MAP2
MAP1
MAP0
00000000
MA P
MSB
LSB
DATA
by te 1
by te n
R/W
R/W
AD D R ESS
CHIP
ADDRESS
CH I P
MSB
LSB MSB
LSB
MAP = Memory Address Pointer, 8 bits, MSB first
High Impedance
1001111
1001111
CCLK
CDIN
CDOUT
CS
Figure 17. Control Port Timing, SPI Mode



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