AD8159ASVZ datasheet(15/24 Pages) AD

15 / 24 page

AD8159

Rev. A | Page 15 of 24

THEORY OF OPERATION

The AD8159 relays received data on the demultiplexer Input

Port C to Output Port A and/or Output Port B, depending on

the mode selected by the BICAST control pin. On the

multiplexer side, the AD8159 relays received data on either

Input Port A or Input Port B to Output Port C, based on the

SEL[3:0] pin states.

The AD8159 is configured by toggling control pins. On the demul-

tiplexer side, when the device is configured in the unicast mode,

it sends the received data on Input Port C to Output Port A or

Output Port B. When the device is configured in the bicast mode,

received data on Input Port C is sent to both Output Port A and

Output Port B.

On the multiplexer side, only received data on Input Port A or

Input Port B is sent to Output Port C, depending on the state of

the SEL[3:0] pins. Table 4 summarizes port selection and

configuration when loopback is disabled (LB_A = LB_B = LB_C

= 0).

When the device is in unicast mode, the output lanes on either

Port A or Port B are in an idle state. In the idle state, the output

tail current is set to 0, and the P and N sides of the lane are

pulled up to the output termination voltage through the on-chip

termination resistors.

Table 4. Port Selection and Configuration Table

SEL

BICAST

OUT_A

OUT_B

OUT_C

IN_C

Idle

IN_A

IN_C

IN_A

Idle

IN_C

IN_B

IN_C

IN_B

INPUT EQUALIZATION (EQ) AND OUTPUT

PRE-EMPHASIS (PE)

In backplane applications, the AD8159 needs to compensate

for signal degradation over potentially long traces. The device

supports two levels of input equalization, configured on a per-

port basis. Table 6 to Table 8 summarize the high-frequency

gain (EQ) for each control setting as well as the typical length

of backplane trace that can be compensated for each setting.

The AD8159 also has four levels of output pre-emphasis,

configured for each port. The pre-emphasis circuitry adds

a controlled amount of overshoot to the output waveform

to compensate for the loss in a backplane trace.

Table 9 to Table 11 summarize the high-frequency gain, amount

of overshoot, and the typical backplane channel length (including

two connectors) that can be compensated using each setting. A

typical backplane is made of FR4 material with 8 mil wide trace

and 8 mil spacing loosely coupled differential traces. Each

backplane channel consists of two connectors. The total length

of the channel includes three inches of traces on each card.

Table 5. Port C I/O Selection

Port C when REVERSE_C = 0

Port C when REVERSE_C = 1

Port C Pin List on

100-Lead TQFP

Pin Name

Input/Output

Pin Name

Input/Output

ION_C3 = INN_C3

Input pin

ION_C3 = OUTN_C3

Output pin

IOP_C3 = INP_C3

Input pin

IOP_C3 = OUTP_C3

Output pin

ION_C2 = INN_C2

Input pin

ION_C2 = OUTN_C2

Output pin

IOP_C2 = INP_C2

Input pin

IOP_C2 = OUTP_C2

Output pin

ION_C1 = INN_C1

Input pin

ION_C1 = OUTN_C1

Output pin

IOP_C1 = INP_C1

Input pin

IOP_C1 = OUTP_C1

Output pin

ION_C0 = INN_C0

Input pin

ION_C0 = OUTN_C0

Output pin

IOP_C0 = INP_C0

Input pin

IOP_C0 = OUTP_C0

Output pin

OIN_C3 = OUTN_C3

Output pin

OIN_C3 = INN_C3

Input pin

OIP_C3 = OUTP_C3

Output pin

OIP_C3 = INP_C3

Input pin

OIN_C2 = OUTN_C2

Output pin

OIN_C2 = INN_C2

Input pin

OIP_C2 = OUTP_C2

Output pin

OIP_C2 = INP_C2

Input pin

OIN_C1 = OUTN_C1

Output pin

OIN_C1 = INN_C1

Input pin

OIP_C1 = OUTP_C1

Output pin

OIP_C1 = INP_C1

Input pin

OIN_C0 = OUTN_C0

Output pin

OIN_C0 = INN_C0

Input pin

OIP_C0 = OUTP_C0

Output pin

OIP_C0 = INP_C0

Input pin

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