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P89LPC9408 bảng dữ liệu(PDF) 9 Page - NXP Semiconductors

tên linh kiện P89LPC9408
Giải thích chi tiết về linh kiện  8-bit microcontroller with two-clock 80C51 core 8 kB 3 V byte-erasable flash, 32 segment x 4 LCD driver, 10-bit ADC
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nhà sản xuất  PHILIPS [NXP Semiconductors]
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P89LPC9408_1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 16 December 2005
9 of 69
Philips Semiconductors
P89LPC9408
8-bit two-clock 80C51 core with 32 segment
× 4 LCD driver, 10-bit ADC
[1]
Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5.
P2.5/SPICLK
20
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When configured as master, this pin is output; when configured
as slave, this pin is input.
P3.0 to P3.1
I/O
Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up disabled.
The operation of Port 3 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port
configurations” and Table 12 “Static electrical characteristics” for details.
All pins have Schmitt triggered inputs.
Port 3 also provides various special functions as described below:
P3.0/XTAL2/
CLKOUT
14
I/O
P3.0 — Port 3 bit 0.
O
XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is
selected via the flash configuration.
O
CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK -TRIM.6). It
can be used if the CPU clock is the internal RC oscillator, watchdog oscillator or
external clock input, except when XTAL1/XTAL2 are used to generate clock source for
the RTC/system timer.
P3.1/XTAL1
13
I/O
P3.1 — Port 3 bit 1.
I
XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when
selected via the flash configuration). It can be a port pin if internal RC oscillator or
watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not used
to generate the clock for the RTC/system timer.
SDA_LCD
63
I/O
SDA LCD — I2C-bus data signal for the LCD controller.
SCL_LCD
64
I
SCL LCD — I2C-bus clock signal for the LCD controller.
BP0 to BP3
27 to 30
O
BP0 to BP3: LCD backplane outputs.
S0 to S31
31 to 62
O
S0 to S31: LCD segment outputs
VSS
12
I
Ground: 0 V reference.
VDD
25
I
Power supply: This is the power supply voltage for normal operation as well as Idle
and Power-down modes.
VLCD
26
I
LCD power supply: LCD supply voltage.
Table 3:
Pin description …continued
Symbol
Pin
Type Description



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