AD7367

Preliminary Technical Data

Rev. PrD | Page 14 of 16

another conversion, as shown in Figure 8. See the Power up

time section for power-up times associated with the AD7367.

BUSY

CONVST

SCLK

tconvert

t2

SERIAL READ OPERATION

CS

t3

tpower-up

1

14

ENTERS SHUT-DOWN

Figure 8. Auto-Shutdown Mode

POWER-UP TIMES

The AD7367 has one power down mode, which has already

been described in detail. This section deals with the power-up

time required when coming out of this modes. It should be

noted that the power-up time, as explained in this section,

be brought high and remain high for a minimum of 100μs, as

shown in Figure 8.

When power supplies are first applied to the AD7367, the ADC

may power up with CONVST in either the low or high logic

state. Before attempting a valid conversion CONVST must be

brought high and remain high for the recommended power up

time of 100μs, it can then be brought low to initiate a

conversion. With the AD7367 no dummy conversion is

required before valid data can be read from the

is intended to place the part in shut-down mode when the

supplies are first applied, then the AD7367 must be powered up

as explained about and a conversion initiated, but CONVST

should remain in the logic low state and when the BUSY signal

goes low thus the part enters shut-down.

Once supplies are applied to the AD7367, enough time must be

allowed for any external reference to power up and charge the

various reference buffer decoupling capacitors to their final values.