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ADV7183B bảng dữ liệu(PDF) 49 Page - Analog Devices |
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ADV7183B bảng dữ liệu(HTML) 49 Page - Analog Devices |
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49 / 100 page ![]() ADV7183B Rev. B | Page 49 of 100 CGMS Data Registers CGMS1[7:0], Address 0x96[7:0], CGMS2[7:0], Address 0x97[7:0], CGMS3[7:0], Address 0x98[7:0] 223H Figure 33 shows the bit correspondence between the analog video waveform and the CGMS1/CGMS2/CGMS3 registers. CGMS3[7:4] are undetermined and should be masked out by software. Closed Caption Data Registers CCAP1[7:0], Address 0x99[7:0], CCAP2[7:0], Address 0x9A[7:0] 224H Figure 34 shows the bit correspondence between the analog video waveform and the CCAP1/CCAP2 registers. CCAP1[7] contains the parity bit from the first word. CCAP2[7] contains the parity bit from the second word. Refer to the 225H GDECAD Gemstar Decode Ancillary Data Format, Address 0x4C[0] section. 01 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 CGMS2[7:0] CGMS3[3:0] CGMS1[7:0] REF +100 IRE +70 IRE 0 IRE –40 IRE 11.2 μs 49.1ms ± 0.5 μs CRC SEQUENCE 2.235 μs ± 20ns Figure 33. CGMS Data Extraction Table 60. CGMS Access Information Signal Name Register Location Address Register Default Value CGMS1[7:0] CGMS 1[7:0] 150d 0x96 Readback only CGMS2[7:0] CGMS 2[7:0] 151d 0x97 Readback only CGMS3[3:0] CGMS 3[3:0] 152d 0x98 Readback only 0 REFERENCE COLOR BURST (9 CYCLES) FREQUENCY = FSC = 3.579545MHz AMPLITUDE = 40 IRE 1 CCAP1[7:0] 7 CYCLES OF 0.5035MHz (CLOCK RUN-IN) CCAP2[7:0] 2 3 4 5 6 7 0 1 2 3 4 5 67 P A R I T Y S T A R T P A R I T Y BYTE 1 BYTE 0 33.764 μs 10.003 μs 10.5 ± 0.25 μs 12.91 μs 27.382 μs 50 IRE 40 IRE Figure 34. Closed Caption Data Extraction Table 61. CCAP Access Information Signal Name Register Location Address Register Default Value CCAP1[7:0] CCAP1[7:0] 153d 0x99 Readback only CCAP2[7:0] CCAP2[7:0] 154d 0x9A Readback only |
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