Nexperia

74LVC74A

Dual D-type flip-flop with set and reset; positive-edge trigger

12. Abbreviations

Table 11. Abbreviations

Acronym

Description

CDM

Charged Device Model

CMOS

Complementary Metal-Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 12. Revision history

Document ID

Release date Data sheet status

Change notice Supersedes

74LVC74A v.9

20210820

Product data sheet

-

74LVC74A v.8

Modifications:

• Type number 74LVC74ADB (SOT337-1/SSOP14) removed.

74LVC74A v.8

20200618

Product data sheet

-

74LVC74A v.7

Modifications:

• The format of this data sheet has been redesigned to comply with the identity

guidelines of Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

• Section 1 and Section 2 updated.

• Table 5: Derating values for Ptot total power dissipation have been updated.

• Table 10 corrected (errata).

• Package outline drawing of SOT762-1 (Fig. 12) updated.

74LVC74A v.7

20121120

Product data sheet

-

74LVC74A v.6

Modifications:

• Table 6, Table 7, Table 8, Table 9 and Table 10: values added for lower voltage ranges.

74LVC74A v.6

20070604

Product data sheet

-

74LVC74A v.5

74LVC74A v.5

20070525

Product data sheet

-

74LVC74A v.4

74LVC74A v.4

20030526

Product specification

-

74LVC74A v.3

74LVC74A v.3

20020618

Product specification

-

74LVC74A v.2

74LVC74A v.2

19980617

Product specification

-

74LVC74A v.1

74LVC74A v.1

19980617

Product specification

-

-

74LVC74A

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 9 — 20 August 2021

14 / 16