Nexperia

74LVC2G38

Dual 2-input NAND gate; open drain

5. Functional diagram

001aah753

1A

1B

1Y

2A

2B

2Y

Fig. 1. Logic symbol

001aah754

&

&

Fig. 2. IEC logic symbol

mnb131

Y

GND

B

A

Fig. 3. Functional diagram (one gate)

6. Pinning information

6.1. Pinning

74LVC2G38

1A

VCC

1B

1Y

2Y

2B

GND

2A

001aab829

1

2

3

4

6

5

8

7

Fig. 4. Pin configuration SOT505-2 (TSSOP8) and

SOT765-1 (VSSOP8)

74LVC2G38

2B

1Y

VCC

2A

2Y

1B

1A

GND

001aab830

3

6

2

7

1

8

4

5

Transparent top view

Fig. 5. Pin configuration SOT833-1, SOT1089, SOT1116

and SOT1203 (XSON8)

74LVC2G38

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Product data sheet

Rev. 14 — 21 June 2022

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