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NB3N502 bảng dữ liệu(PDF) 2 Page - ON Semiconductor

tên linh kiện NB3N502
Giải thích chi tiết về linh kiện  14 MHz to 190 MHz PLL Clock Multiplier
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NB3N502 bảng dữ liệu(HTML) 2 Page - ON Semiconductor

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NB3N502
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Figure 2. Pin Configuration (Top View)
CLKOUT
S0
S1
X2
X1/CLK
VDD
GND
REF
1
2
3
45
6
7
8
Table 1. CLOCK MULTIPLIER SELECT TABLE
S1*
S0**
Multiplier
L
L
2X
L
H
5X
M
L
3X
M
H
3.33X
H
L
4X
H
H
2.5X
L = GND
H = VDD
M = OPEN (unconnected)
* Pin S1 defaults to M when left open
** Pin S0 defaults to H when left open
Table 2. OUTPUT FREQUENCY EXAMPLES
Output Frequency (MHz)
20
25
33.3
48
50
54
64
66.66
75
100
108
120
135
Input Frequency (MHz)
10
10
10
16
20
13.5
16
20
15
20
27
24
27
S1, S0
0 ,0
1, 1
M, 1
M, 0
1, 1
1, 0
1, 0
M, 1
0, 1
0, 1
1, 0
0, 1
0, 1
Table 3. PIN DESCRIPTION
Pin #
Name
I/O
Description
1
X1/CLK
Input
Crystal or External Reference Clock Input
2
VDD
Power Supply
Positive Supply Voltage (3 V to 5.5 V)
3
GND
Power Supply
0 V Ground.
4
REF
CMOS/TTL Output
Buffered Crystal Oscillator Clock Output
5
CLKOUT
CMOS/TTL Output
Clock Output
6
S0
CMOS/TTL Input
Multiplier Select Pin − Connect to VDD or GND. Internal Pull−up Resistor.
7
S1
Three−level Input
Multiplier Select Pin − Connect to VDD, GND or Float to M.
8
X2
Crystal Input
Crystal Input − Do Not Connect when Providing an External Clock Reference
Table 4. ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model
Machine Model
> 8 kV
> 600 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
6700 Devices
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.



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