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AD8352ACPZ-R7 bảng dữ liệu(PDF) 17 Page - Analog Devices

tên linh kiện AD8352ACPZ-R7
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AD8352ACPZ-R7 bảng dữ liệu(HTML) 17 Page - Analog Devices

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AD8352
Rev. 0 | Page 17 of 20
EVALUATION BOARD LOADING SCHEMES
The AD8352 evaluation board is characterized with two load
configurations representing the most common ADC input
resistance. The loads chosen are 200 Ω and 1000 Ω using a
broadband resistive match. The loading can be changed via R8,
R9, and R12 giving the flexibility to characterize the AD8352
evaluation board for the load in any given application. These
loads are inherently lossy and thus must be accounted for in
overall gain/loss for the entire evaluation board. Measure the
gain of the AD8352 with an oscilloscope using the following
procedure to determine the actual gain:
1.
Measure the peak-to-peak voltage at the input node
(C2 or C3), and
2.
Measure the peak-to-peak voltage at the output node
(C4 or C5), then
3.
Compute gain using the formula
Gain = 20log VOUT/VIN
Table 11. Values Used for 200 Ω and 1000 Ω Loads
Component
200 Ω Load
1000 Ω Load
R8
86.6
487
R9
57.6
51.1
R12
86.6
487



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