WMS7202

Publication Release Date: January 2003

- 17 -

Revision 1.1

TABLE 10 – TIMING PARAMETERS

Note: The interface timing characteristics apply to all parts but are guaranteed by design and not

subject to production test.

PARAMETER

SYMBOL

MIN.

MAX.

UNIT

SPI Clock Cycle Time

100

ns

SPI Clock HIGH Time

50

ns

SPI Clock LOW Time

50

ns

Lead Time

100

ns

Lag Time

100

ns

SDI Setup Time

20

ns

SDI Hold Time

20

ns

CS

to SDO – SPI Line Acquire

5

ns

CS

to SDO – SPI Line Release

5

ns

CLK to SDO Propagation Delay

1

ns

500

ns

Store to NVMEM Save Time

2

ms

CS

Deselect Time

600

ns

Startup Time

0.1

ms

WP

Setup Time

10

ns

WP

Hold Time

10

ns