WMS7204010P datasheet(6/29 Pages) WINBOND

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WMS7201

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6. PIN DESCRIPTION

TABLE 1 – PIN DESCRIPTION

PIN NAME

PIN NO

I/O

DESCRIPTION

CLK

Serial Clock pin. Data Shifts in one bit at a time on positive clock

(CLK) edges

Chip Select pin. When CS is HIGH, WMS7201 is deselected and

the SDO pin is at high impedance, and (unless an internal write

cycle is underway) the device will be in the standby state. CS LOW

enables WMS7201, placing it in the active power mode. It should

be noted that after a power-up, a HIGH to LOW transition on CS is

required prior to the start of any operation.

SDI

Serial Data Input pin. All opcodes, byte addresses and data to be

written to the registers are input on this pin. Data is latched by the

rising edge of the serial clock.

SDO

Serial Data Output pin with open-drain output. During a read cycle,

data is shifted out on this pin. Data is clocked out by the falling

edge of the serial clock except for the 1

st bit, which is clocked out

by the falling edge of CS. Also can be used to daisy-chain several

parts. (Only 10-pin TSSOP package)

Hardware Write Protect pin. When active LOW WP prevents any

changes to the present contents except retrieving NVMEM

contents. (Only 10-pin TSSOP package)

VDD

Power Supply

VSS

Ground pin, logic ground reference

VA1

A terminal of potentiometer ‘1’, equivalent to the HI terminal

connection on a mechanical potentiometer

VB1

B terminal of potentiometer ‘1’, equivalent to the LO terminal

connection on a mechanical potentiometer

VW1

Wiper terminal of potentiometer ‘1’, equivalent to the wiper terminal

of a mechanical potentiometer

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