1

TM

March 1997

HM-6516

2K x 8 CMOS RAM

Features

• Low Power Standby. . . . . . . . . . . . . . . . . . . 275

µW Max

• Low Power Operation . . . . . . . . . . . . . .55mW/MHz Max

• Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max

• Industry Standard Pinout

• Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V VCC

• TTL Compatible

• Static Memory Cells

• High Output Drive

• On-Chip Address Latches

• Easy Microprocessor Interfacing

Description

The HM-6516 is a CMOS 2048 x 8 Static Random Access

Memory. Extremely low power operation is achieved by the

use of complementary MOS design techniques. This low

power is further enhanced by the use of synchronous circuit

techniques that keep the active (operating) power low, which

also gives fast access times. The pinout of the HM-6516 is

the popular 24 pin, 8-bit wide JEDEC standard, which allows

easy memory board layouts, flexible enough to accommo-

date a variety of PROMs, RAMS, EPROMs, and ROMs.

The HM-6516 is ideally suited for use in microprocessor

based systems. The byte wide organization simplifies the

memory array design, and keeps operating power down to a

minimum, because only one device is enabled at a time. The

address latches allow very simple interfacing to recent gen-

eration

microprocessors

which

employ

a

multiplexed

address/data bus. The convenient output enable control also

simplifies multiplexed bus interfacing by allowing the data

outputs to be controlled independent of the chip enable.

Ordering Information

120ns

200ns

TEMP. RANGE

PACKAGE

PKG. NO.

HM1-6516B-9

HM1-6516-9

-40oC to +85oC

CERDIP

F24.6

-

29102BJA

-55oC to +125oCJAN#

F24.6

8403607JA

8403601JA

-55oC to +125oCSMD#

F24.6

-

HM4-6516-9

-40oC to +85oC

CLCC

J32.A

8403607ZA

8403601ZA

-55oC to +125oCSMD#

J32.A

Pinouts

HM-6516

(CERDIP)

TOP VIEW

HM-6516

(CLCC)

TOP VIEW

1

2

3

4

5

6

7

8

9

10

11

12

16

17

18

19

20

21

22

23

24

15

14

13

A7

A6

A5

A4

A3

A2

A1

A0

DQ0

DQ1

DQ2

GND

VCC

A9

W

G

A10

DQ7

DQ5

DQ4

DQ3

A8

E

DQ6

5

6

7

8

11

10

9

13

12

27

28

29

26

25

24

23

22

21

3

2

1

4

32

31

30

16

17

18

19

20

14 15

A6

A5

A4

A3

A2

A1

A0

NC

DQ0

A8

A9

NC

G

A10

E

DQ7

DQ6

W

PIN

DESCRIPTION

NC

No Connect

A0 - A10

Address Inputs

E

Chip Enable/Power Down

VSS/GND

Ground

DQ0 - DQ7 Data In/Data Out

VCC

Power (+5V)

W

Write Enable

G

Output Enable

File Number

2998.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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