87421 Data Sheet

©2016 Integrated Device Technology, Inc

June 24, 2016

10

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the 87421I.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the 87421I is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V

DD

= 3.3V + 5% = 3.465V, which gives worst case results.

Power_

MAX

= V

DD_MAX

* I

DD_MAX

= 3.465V * 55mA = 198.58mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the

device. The maximum recommended junction temperature for HiPerClockS

TM devices is 125°C.

The equation for Tj is as follows: Tj =

θJA * Pd_total + TA

Tj = Junction Temperature

θJA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance

θJAmust be used. Assuming no air flow

and a multi-layer board, the appropriate value is 96°C/W per Table 6 below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.199W * 96°C/W = 104.1°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the

type of board (single layer or multi-layer).

TABLE 6. THERMAL RESISTANCE

θ

JA

FOR

8-PIN SOIC, FORCED CONVECTION

θ

JA

by Velocity (Meters per Second)

0

1

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

96°C/W

87°C/W

82°C/W