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LP5996 bảng dữ liệu(PDF) 12 Page - National Semiconductor (TI) |
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LP5996 bảng dữ liệu(HTML) 12 Page - National Semiconductor (TI) |
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12 / 14 page ![]() Application Hints (Continued) capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25˚C down to -40˚C, so some guard band must be allowed. ENABLE CONTROL The LP5996 features active high enable pins for each regu- lator, EN1 and EN2, which turns the corresponding LDO off when pulled low. The device outputs are enabled when the enable pins are set to high. When not enabled the regulator output is off and the device typically consumes 2nA. If the application does not require the Enable switching feature, one or both enable pins should be tied to V IN to keep the regulator output permanently on. To ensure proper operation, the signal source used to drive the enable inputs must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under V IL and VIH. BYPASS CAPACITOR The internal voltage reference circuit of the LP5996 is con- nected to the C BYP pin via a high value internal resistor. An external capacitor, connected to this pin, forms a low-pass filter which reduces the noise level on both outputs of the device. There is also some improvement in PSSR and line transient performance. Internal circuitry ensures rapid charg- ing of the C BYP capacitor during start-up. A 10nF, high quality ceramic capacitor with either NPO or COG dielectric is rec- ommended due to their low leakage characteristics and low noise performance. SAFE AREA OF OPERATION Due consideration should be given to operating conditions to avoid excessive thermal dissipation of the LP5996 or trigger- ing its thermal shutdown circuit. When both outputs are enabled, the total power dissipation will be P D(LDO1) +PD(LDO2) where PD = (VIN -VOUT)xIOUT for each LDO In general, device options which have a large difference in output voltage will dissipate more power with both outputs enabled, due to the input voltage required for the higher output voltage LDO. In such cases, especially at elevated ambient temperature, it may not be possible to operate both outputs at maximum current at the same time. www.national.com 12 |
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