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CY29943AI bảng dữ liệu(PDF) 4 Page - Cypress Semiconductor

tên linh kiện CY29943AI
Giải thích chi tiết về linh kiện  2.5V or 3.3V 200-MHz 1:18 Clock Distribution Buffer
PDF  7 Pages
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nhà sản xuất  CYPRESS [Cypress Semiconductor]
Trang chủ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY29943AI bảng dữ liệu(HTML) 4 Page - Cypress Semiconductor

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CY29943
Document #: 38-07285 Rev. *C
Page 4 of 7
Notes:
6.
Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
7.
Outputs driving 50
Ω transmission lines.
8.
Outputs loaded with 15 pF each.
9.
See Figure 1.
10. Across temperature and voltage ranges, includes output skew.
11. For a specific temperature and voltage, includes output skew.
AC Parameters[6] (VDD = 3.3V ±5% or 2.5V ±5%, VDDC = 3.3V ±5% or 2.5V ±5%, over the specified temperature range)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
Fmax
Input Frequency
200
MHz
Tpd
PECL_CLK to Q Delay[7, 8]
VDD = 3.3V
2.0
3.5
4.0
ns
VDD = 2.5V
2.6
4.0
5.2
FoutDC
Output Duty Cycle[7, 8, 9]
40
60
%
Tskew
Output-to-Output Skew[7, 8]
200
ps
Tskew(pp)
Part-to-Part Skew[10]
VDD = 3.3V
1.7
ns
VDD = 2.5V
2.2
Tskew(pp)
Part-to-Part Skew[11]
1.0
ns
Tr/Tf
Output Clocks Rise/Fall
Time[7, 8]
0.8V to 2.0V,
VDD = 3.3V
0.2
1.1
ns
0.5V to 1.8V,
VDD = 2.5V
Differential
Pulse
Generator
Z = 50 ohm
Zo = 50 ohm
Zo = 50 ohm
VTT
RT = 50 ohm
CY29943 DUT
Zo = 50 ohm
RT = 50 ohm
VTT
Figure 1. PECL_CLK CY29943 Test Reference for VCC = 3.3V and VCC = 2.5V
tPD
PECL_CLK
PECL_CLK
VPP
Q
VCMR
VCC
GND
VCC /2
Figure 2. Propagation Delay (TPD) Test Reference



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