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S29PL-N bảng dữ liệu(PDF) 45 Page - SPANSION

tên linh kiện S29PL-N
Giải thích chi tiết về linh kiện  256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
PDF  85 Pages
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S29PL-N bảng dữ liệu(HTML) 45 Page - SPANSION

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November 23, 2005 S29PL-N_00_A4
S29PL-N MirrorBit™ Flash Family
43
Preliminary
7.5
Simultaneous Read/Write
The simultaneous read/write feature allows the host system to read data from one bank of mem-
ory while programming or erasing another bank of memory. An erase operation may also be
suspended to read from or program another location within the same bank (except the sector
being erased). Figure 11.12, Back-to-back Read/Write Cycle Timings shows how read and write
cycles may be initiated for simultaneous operation with zero latency. See the table, DC Charac-
teristics for read-while-program and read-while-erase current specifications.
Note: Amax = A23 (PL256N), A22 (PL127N)
Figure 7.5 Simultaneous Operation Block Diagram for S29PL256N and S29PL127N
VCC
VSS
Bank A Address
Bank B Address
Amax – A0
RESET#
WE#
CE#
DQ0 – DQ15
State
Control
and
Command
Register
RY/BY#
Bank A
X-Decoder
OE#
DQ15 – DQ0
Status
Control
Amax–A0
Amax – A0
Mux
Mux
Mux
Bank B
X-Decoder
Bank C
X-Decoder
Bank D
X-Decoder
Bank C Address
Bank D Address
WP#/ACC



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