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S71PL254JB0BAWTZ2 bảng dữ liệu(PDF) 22 Page - SPANSION

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S71PL-J Based MCPs
S71PL-J_00_B3 March 17, 2006
Ad van c e
Inf o rmation
Replaced “S71PL064JA0-0Z” with
Added row with the following content:S71PL064JB0-07; 65; 32M pSRAM; 70; Psram
1; TLC056.
“32Mb Flash Memory” on page 3
Replaced “S71PL032JA0-08” with “S71PL032JA0-0F”.
“64Mb Flash Memory” on page 3
Replaced “S71PL032JA0-07” with “S71PL032JA0-0K”.
“128Mb Flash Memory” on page 4
Added row with the following content: S71PL127JB0-9; 65; 32M pSRAM; 70;
pSRAM; TLA064.
Replaced “S71PL127JB0-97” with “S71PL127JB0-9Z”.
Added row with the following content: S71PL127JC0-97; 65; 64M pSRAM; 70;
pSRAM1; TLA064.
Replaced “S71PL127JC0-9P” with “S71PL127JC0-9Z”.
In the S71Pl254JB0-TB row changed pSRAM type from “pSRAM3” to “pSRAM2”.
“256Mb Flash Memory (2xS29PL127J)” on page 4
Added row with the following content: S71PL254JB0-TB; 65; 32M pSRAM; 70;
pSRAM3; FTA084.
Added row with the following content: S71PL254JC0-TB; 65; 64M pSRAM; 70;
pSRAM2; FTA084.
“Connection Diagram (S71PL127J)” on page 12
Updated pins D8, D9, and L5.
Added notes 2 and 3 to drawing.
“Connection Diagram (S71PL254J)” on page 13
Updated pins D8 and D9.
Added Note 2 to drawing.
“S71PL032J Valid Combinations” on page 16
Changed S71PL032J08 (p)SRAM Type Access Time (ns) from “SRAM1” to
“SRAM2” (4 changes made in table).
Changed S71PL032JA0 (p)SRAM Type Access Time (ns) from “SRAM3 / 70” to
pSRAM3 /70”.
Deleted all cells with the following collaborated text: “BAW,BFW, BAI. BFI”.
Merged previous place holder with cell above.
“S71PL064J Valid Combinations” on page 17
In (p)SRAM Type/Access Time (ns) changed all instances of “stet” to “pSRAM1/
70”.
In Package Modifier/Model Number changed all instances of “stet” to “07”.
Added row to BAW Package and Temperature sections with the following content:
S71PL064JB0; 07; 65 (previously inclusive); pSRAM1/70.
“S71PL127J Valid Combinations” on page 18
Changed the S71PL127JA0 Package Modifier/Model Number from “9Z” to “9P” (4
instances).



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