XRD6406

7

Rev. 1.00

1023

768

512

256

0

1V

2V

3V

4V

Figure 7. A Piece Wise Linear, Logarithmic

Transfer Function

APPLICATION NOTES

DGND or AGND --0.5V. All pins have internal protection diodes

that will protect them from short transients (<100ms) outside the

supply range.

AGND and DGND pins are connected internally through the P--

substrate. DC voltage differences between these pins will

cause undesirable internal substrate currents.

pins should be decoupled with 0.1mF and 10mF capacitors to

AGND, placed as close to the chip as possible.

The digital outputs should not drive long wires or buses. The

capacitive coupling and reflections will contribute noise to the

conversion.

This part has a switched capacitor type input circuit. This means

that the input impedance changes with the phase of the input

clock.

Figure 8. shows an equivalent input circuit.

Figure 8. Equivalent Input Circuit

160W

+

-

AGND

100W

18pF

1.5pF

CLK

CLK

CLK

5pF

2

RTS & RBS Internal Bias Resistors

Two matched resistors are provided on the chip. These resistors

can be used to generate on chip reference voltages. Each

resistor has a value equal to 1/3 of the reference ladder resistor.

should be left unconnected.

R1 thru R3 Reference Ladder Taps

These taps connect to every quarter point along the reference

microfarad capacitors to AGND; this helps reduce the INL errors

by stabilizing the reference ladder voltages. These taps can

also be used to alter the transfer curve of the ADC. A four

segment, piecewise linear, custom transfer curve can be

designed by connecting voltage sources to these pins.