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LP5912 bảng dữ liệu(PDF) 6 Page - Texas Instruments

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tên linh kiện LP5912
Giải thích chi tiết về linh kiện  LP5912-EP Enhanced Product, 500-mA, Low-Noise, Low-IQ LDO
PDF  33 Pages
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6.5 Electrical Characteristics (continued)
VIN = VOUT(NOM) + 0.5 V or 1.6 V, whichever is greater; VEN = 1.35 V, CIN = 1 μF, COUT = 1 μF, IOUT = 1 mA (unless otherwise
stated).(1) (2) (3)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PGLTH
PG low threshold (% of
nominal VOUT)
86
90
93
%
VOL(PG)
PG pin low-level output voltage VOUT < PGLTH, sink current = 1 mA
400
mV
ILKG(PG)
PG pin leakage current
VOUT < PGHTH, VPG = 6 V
1
µA
TRANSITION CHARACTERISTICS
ΔVOUT
Line transients (9)
For VIN ↑ and VOUT(NOM) ≥ 1.1 V,
VIN = (VOUT(NOM) + 0.5 V) to (VOUT(NOM) + 1.1 V),
VIN trise = 30 µs
1
mV
For VIN ↑ and VOUT(NOM) < 1.1 V,
VIN = 1.6 V to 2.2 V,
VIN trise = 30 µs
For VIN ↓ and VOUT(NOM) ≥ 1.1 V,
VIN = (VOUT(NOM) + 0.5 V) to (VOUT(NOM) + 1.1 V),
VIN trise = 30 µs
-1
For VIN ↓ and VOUT(NOM) < 1.1 V,
VIN = 1.6 V to 2.2 V,
VIN trise = 30 µs
Load transients (9)
IOUT = 5 mA to 500 mA,
IOUT tRISE = 10 μs
-45
mV
IOUT = 500 mA to 5 mA,
IOUT tFALL = 10 μs
45
Overshoot on start-up (9)
5
%
tON
Turnon time
From VEN > VEN(ON) to VOUT = 95% of VOUT(NOM)
200
µs
OUTPUT AUTO DISCHARGE RATE
RAD
Output discharge pulldown
resistance
VEN = 0 V, VIN = 3.6 V
100
Ω
(1)
All voltages are with respect to the device GND pin, unless otherwise stated.
(2)
Minimum and maximum limits are specified through test, design, or statistical correlation over the junction temperature (TJ ) range of
–55°C to +125°C, unless otherwise stated. Typical values represent the most likely parametric norm at TA = 25°C, and are provided for
reference purposes only.
(3)
In applications where high power dissipation and poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP
= 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of
the part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
(4)
Short-circuit current (ISC) is equivalent to current limit. To minimize thermal effects during testing, ISC is measured with VOUT pulled to
100 mV below its nominal voltage.
(5)
Reverse current (IRO) is measured at the IN pin.
(6)
Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
(7)
Ground current is defined here as the total current flowing to ground as a result of all input voltages applied to the device (IQ + IEN).
(8)
Dropout voltage (VDO) is the voltage difference between the input and the output at which the output voltage drops to 150 mV below its
nominal value when VIN = VOUT + 0.5 V. Dropout voltage is not a valid condition for output voltages less than 1.6 V as compliance with
the minimum operating voltage requirement cannot be assured.
(9)
This specification is specified by design.
(10) There is a 3-MΩ pulldown resistor between the EN pin and GND pin on the device.
6.6 Output and Input Capacitors
over operating free-air temperature range (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
NOM
MAX
UNIT
CIN
Input capacitance (1)
Capacitance for stability
0.7
1
µF
COUT
Output capacitance (1)
Capacitance for stability
0.7
1
10
µF
COUT_ESR
Output capacitor ESR(1)
5
500
mΩ
(1)
This specification is verified by design.
LP5912-EP
SNVSC57 – SEPTEMBER 2022
www.ti.com
6
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