ICS841484I Data Sheet

FEMTOCLOCK® CRYSTAL-TO-0.7V DIFFERENTIAL HCSL CLOCK GENERATOR

ICS841484DKI REVISION A NOVEMBER 7, 2012

21

©2012 Integrated Device Technology, Inc.

Power Considerations

This section provides information on power dissipation and junction temperature for the ICS841484I.

Equations and example calculations are also provided.

1.

Power Dissipation.

The total power dissipation for the ICS841484I is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.

NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

•

Power (core)MAX = VDD_MAX * (IDD + IDDA)= 3.465V *(156mA + 16mA) = 596mW

•

Power (HCSL)MAX = 4 x 44.5mW = 178mW

LVCMOS Driver Power Dissipation

•

Output Impedance ROUT Power Dissipation due to Loading 50 to VDD/2

Output Current IOUT = VDD_MAX / [2 * (50 + ROUT)] = 3.465V / [2 * (50 + 27)] = 22.5mA

•

Power Dissipation on the ROUT per LVCMOS output

Power (LVCMOS) = ROUT * (IOUT)

2 = 27

 * (22.5mA)2 = 13.7mW per output

Total Power

= Power (core) + Power (HCSL) + Power (LVCMOS)

= 596mW + 178mW + 13.7mW

= 787.7mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond

wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj =



JA * Pd_total + TA

Tj = Junction Temperature



JA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance



JA must be used. Assuming no air flow and

a multi-layer board, the appropriate value is 33.1°C/W per Table 7 below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.788W * 33.1°C/W = 111.1°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of

board (multi-layer).

Table 7. Thermal Resistance JA for 32 Lead VFQFN, Forced Convection



JA vs. Air Flow

Meters per Second

013

Multi-Layer PCB, JEDEC Standard Test Boards

33.1°C/W

28.1°C/W

25.4°C/W