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82571EB bảng dữ liệu(PDF) 2 Page - Intel Corporation

tên linh kiện 82571EB
Giải thích chi tiết về linh kiện  Gigabit Ethernet Controller
PDF  4 Pages
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nhà sản xuất  INTEL [Intel Corporation]
Trang chủ  http://www.intel.com
Logo INTEL - Intel Corporation

82571EB bảng dữ liệu(HTML) 2 Page - Intel Corporation

  82571EB Datasheet HTML 1Page - Intel Corporation 82571EB Datasheet HTML 2Page - Intel Corporation 82571EB Datasheet HTML 3Page - Intel Corporation 82571EB Datasheet HTML 4Page - Intel Corporation  
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Features
Benefits
PCI Express* Features
Uses x4 PCI Express interface on Memory Control Hub (MCH) device
•
Bus sharing not required
•
Low latency path to memory
2 Gbps peak bandwidth per direction per PCI Express lane
•
Supports dual-port Gigabit Ethernet at wire speed
Complies with peripheral component interconnect (PCI) Power
•
Provides PCI Express power management capabilities for PC and embedded applications
Management 1.1 and advanced configuration and power interface
(ACPI) 2.0 register set (D0 & D3 power states, Network Device Class
Power Management Specification 1.1)
High bandwidth density per pin
•
Less congested board routing
Gigabit MAC/PHY Advanced Features
Wide, pipelined internal data path architecture
•
Low-latency data handling
•
Superior direct memory access (DMA) transfer-rate performance
Multiple, optimized transmit (Tx) and receive (Rx) queues
•
Network packet handling without waiting or buffer overflow
•
Efficient packet prioritization
Dual 48 KB configurable Rx and Tx first-in/first-out (FIFO) buffers
•
No external FIFO memory requirements
with support for error correction code (ECC)
•
FIFO size adjustable to application
•
Error detection and correction for FIFO data
Support for transmission and reception of packets up to 9 Kbytes
•
Enables use of jumbo frames
IEEE 802.3* compliant flow-control support with software-
•
Frame loss reduced from receive overruns
controllable pause times and threshold values
•
Hardware or software control over transmission of pause frames
Caches up to 64 packet descriptors per queue
•
Efficient use of PCI Express bandwidth
Programmable host memory receive buffers (256 Bytes to 16 KBytes)
•
Efficient use of PCI Express bandwidth
and cache line size (64 Bytes to 128 Bytes)
Descriptor ring management hardware for Tx/Rx with optimized
•
Simple software programming model
descriptor fetching and write-back mechanisms
•
Efficient use of system memory and PCI Express
Mechanism for reducing interrupts from Tx/Rx operations
•
Maximizes system performance and throughput
Integrated PHY for 10/100/1000 Mbps (full- and half-duplex)
•
Smaller footprint, lower power dissipation compared to multi-chip MAC and PHY solutions
IEEE 802.3 auto-negotiation support
•
Automatic link configuration for speed, duplex, flow control
IEEE 802.3 PHY compliance and compatibility
•
Robust operation over installed base of Category-5 twisted-pair cabling
Built-in cable diagnostics and adjustments for cable faults
•
Improved end-user troubleshooting
•
Tolerance of common wiring faults
Host Offloading Features
Tx/Rx IP, TCP, and UDP checksum offloading (IPv4, IPv6)
•
Lower processor utilization
Tx TCP segmentation (IPv4, IPv6)
•
Increased throughput and lower processor utilization
•
Compatible with large send offload (in Microsoft Windows* operating systems)
Packet filtering including:
•
16 exact-matched packets (unicast or multicast)
•
Ability to use advanced packet filtering in software
•
4096-bit hash filter for multicast frames
•
Lower processor utilization
•
Promiscuous (unicast and multicast) transfer mode support
•
Filtering of invalid frames
IEEE 802.1q* virtual local area network (VLAN) support with VLAN tag
•
Ability to create multiple VLAN segments
insertion, stripping, and packet filtering for up to 4096 VLAN tags
Manageability Features
Two SMB ports, one with Fast Management Link capability
•
Allows packet routing to and from either LAN port and a Board Management Controller (BMC) such as IPMI
•
Manageability data transfers up to 8 Mbps peak rate
Alerting Standards Format 2.0
•
Standard alerting capability to notify IT of system events
Advanced pass through
•
Filtering and redirection for management packets
•
Support for serial text and keyboard redirection and remote floppy/CD
Preboot eXecution Environment (PXE) flash interface support
•
Enables system boot up via the LAN
(32 bit and 64 bit)
•
Flash interface for PXE image
Simple Network Management Protocol (SNMP) and Remote
•
Easy system monitoring with industry-standard consoles
Network Monitoring (RMON) statistic counters
SDG 3.0, Wired for Management (WfM) 3.0 and PC2001 compliant
•
Remote network management through Desktop Management Interface (DMI) 2.0 and SNMP
Wake on LAN support
•
Packet recognition and wake-up for LAN on motherboard applications without software configuration



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