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ADV7393 bảng dữ liệu(PDF) 89 Page - Analog Devices

tên linh kiện ADV7393
Giải thích chi tiết về linh kiện  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

ADV7393 bảng dữ liệu(HTML) 89 Page - Analog Devices

Back Button ADV7393 Datasheet HTML 85Page - Analog Devices ADV7393 Datasheet HTML 86Page - Analog Devices ADV7393 Datasheet HTML 87Page - Analog Devices ADV7393 Datasheet HTML 88Page - Analog Devices ADV7393 Datasheet HTML 89Page - Analog Devices ADV7393 Datasheet HTML 90Page - Analog Devices ADV7393 Datasheet HTML 91Page - Analog Devices ADV7393 Datasheet HTML 92Page - Analog Devices ADV7393 Datasheet HTML 93Page - Analog Devices Next Button
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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 89 of 96
Table 85. 16-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x08
16-bit input enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 86. 16-Bit 625i RGB In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x87
0x80
RGB input enabled.
0x88
0x08
16-bit input enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 87. 16-Bit 625i RGB In, CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC3
Pixel data valid. CVBS/S-Video out.
SSAF PrPb filter enabled. Active video
edge control enabled.
0x87
0x80
RGB input enabled.
0x88
0x08
16-bit input enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 88. 16-Bit 625i RGB In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x87
0x80
RGB input enabled.
0x88
0x08
16-bit input enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.



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