ICS9250-08 datasheet(14/17 Pages) RENESAS

tên linh kiện	ICS9250-08

Giải thích chi tiết về linh kiện	Frequency Generator & Integrated Buffers for Celeron & PII/III™

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ICS9250-08

0378J—05/17/05

General Layout Precautions:

1) Use a ground plane on the top layer

of the PCB in all areas not used by

traces.

2) Make all power traces and ground

traces as wide as the via pad for

lower inductance.

Notes:

1) All clock outputs should have a

series terminating resistor, and a

20pF capacitor to ground between

the resistor and clock pin. Not

shown in all places to improve

readibility of diagram.

2) Optional crystal load capacitors

are recommended. They should be

included in the layout but not

inserted unless needed.

Component Values:

C1 : Crystal load values determined by user

C2 : 22µF/20V/D case/Tantalum

AVX TAJD226M020R

C3 : 100pF ceramic capacitor

C4 : 20pF capacitor

FB = Fair-Rite products 2512066017X1

All unmarked capacitors are 0.01µF ceramic

Connections to VDD:

= Routed Power

= Ground Connection (component side copper)

= Ground Plane Connection

= Power Route Connection

= Solder Pads

= Clock Load

Ferrite

Bead

VDD

22µF/20V

Tantalum

Ferrite

Bead

VDD

22µF/20V

Tantalum

Clock Load

3.3V Power Route

Ground

2.5V Power Route

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