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ADC0804S040 bảng dữ liệu(PDF) 8 Page - Renesas Technology Corp

tên linh kiện ADC0804S040
Giải thích chi tiết về linh kiện  Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
PDF  18 Pages
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ADC0804S030_040_050_3
© IDT 2012. All rights reserved.
Product data sheet
Rev. 03 — 2 July 2012
8 of 18
Integrated Device Technology
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Harmonics (fclk = 40 MHz); see Figure 7 and 8
1H
first harmonic level
fi = 4.43 MHz
-
-
0
dB
2H
second harmonic level
fi = 4.43 MHz
-
75
65
dB
3H
third harmonic level
fi = 4.43 MHz
-
72
65
dB
THD
total harmonic distortion fi = 4.43 MHz
-
65
-
dB
Signal-to-noise ratio; see Figure 7 and 8[7]
S/N
signal-to-noise ratio
full scale;
without harmonics;
fclk = 40 MHz; fi = 4.43 MHz
46
49
-
dB
Effective number of bits[7]
ENOB
effective number of bits ADC0804S030TS (fclk = 30 MHz)
fi = 4.43 MHz
-
7.8
-
bits
fi = 7.5 MHz
-
7.8
-
bits
ADC0804S040TS (fclk = 40 MHz)
fi = 4.43 MHz
-
7.8
-
bits
fi = 7.5 MHz
-
7.8
-
bits
fi = 10 MHz
-
7.8
-
bits
fi = 15 MHz
-
7.4
-
bits
ADC0804S050TS (fclk = 50 MHz)
fi = 4.43 MHz
-
7.8
-
bits
fi = 7.5 MHz
-
7.8
-
bits
fi = 10 MHz
-
7.8
-
bits
fi = 15 MHz
-
7.3
-
bits
Two-tone intermodulation[8]
IM
intermodulation
suppression
fclk = 40 MHz
-
69
-
dB
Bit error rate
BER
bit error rate
fclk = 40 MHz; fi = 4.43 MHz;
VI = 16 LSB at code 512
-
1013
-
times/
samples
Differential gain[9]
Gdif
differential gain
fclk = 40 MHz;
PAL modulated ramp
-
0.8
-
%
Table 6.
Characteristics
VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V;
VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 C to 70 C; typical values measured at
VCCA = VCCD = 5 V and VCCO = 3.3 V, Vi(a)(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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