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7204L50LGI bảng dữ liệu(PDF) 6 Page - Renesas Technology Corp

tên linh kiện 7204L50LGI
Giải thích chi tiết về linh kiện  CMOS ASYNCHRONOUS FIFO
PDF  15 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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7204L50LGI bảng dữ liệu(HTML) 6 Page - Renesas Technology Corp

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COMMERCIAL,INDUSTRIALANDMILITARY
TEMPERATURERANGES
IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9
loaded(seeOperatingModes).TheSingleDeviceModeisinitiatedbygrounding
the Expansion In (XI).
TheIDT7203/7204/7205/7206/7207/7208canbemadetoretransmitdata
when the Retransmit Enable Control (RT) input is pulsed LOW. A retransmit
operationwillsettheinternalreadpointertothefirstlocationandwillnotaffectthe
writepointer. ThestatusoftheFlagswillchangedependingontherelativelocations
of the read and write pointers. Read Enable (R) and Write Enable (W) must be
intheHIGHstateduringretransmit. Thisfeatureisusefulwhenlessthan2,048/
4,096/8,192/16,384/32,768/65,536writesareperformedbetweenresets. The
retransmitfeatureisnotcompatiblewiththeDepthExpansionMode.
EXPANSIONIN(XI)—Thisinputisadual-purposepin. ExpansionIn(XI)
isgroundedtoindicateanoperationinthesingledevicemode. ExpansionIn(XI)
isconnectedtoExpansionOut(XO)ofthepreviousdeviceintheDepthExpansion
or Daisy-Chain Mode.
OUTPUTS:
FULLFLAG
(FF)—TheFullFlag(FF)willgoLOW,inhibitingfurtherwrite
operations,whenthedeviceisfull. IfthereadpointerisnotmovedafterReset(RS),
the Full Flag (FF) will go LOW after 2,048/4,096/8,192/16,384/32,768/65,536
writes.
EMPTYFLAG(EF)—TheEmptyFlag(EF)willgoLOW,inhibitingfurther
readoperations,whenthereadpointerisequaltothewritepointer,indicatingthat
thedeviceisempty.
EXPANSIONOUT/HALF-FULLFLAG(XO/HF)—Thisisadual-purpose
output. Inthesingledevicemode,whenExpansionIn(XI)isgrounded,thisoutput
actsasanindicationofahalf-fullmemory.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
theHalf-FullFlag(HF)willbesettoLOWandwillremainsetuntilthedifference
betweenthewritepointerandreadpointerislessthanorequaltoonehalfofthe
totalmemoryofthedevice. TheHalf-FullFlag(HF)isthenresetbytherisingedge
ofthereadoperation.
IntheDepthExpansionMode,ExpansionIn(XI)isconnectedtoExpansion
Out (XO)ofthepreviousdevice. Thisoutputactsasasignaltothenextdevice
intheDaisyChainbyprovidingapulsetothenextdevicewhenthepreviousdevice
reachesthelastlocationofmemory. TherewillbeanXOpulsewhentheWrite
pointerreachesthelastlocationofmemory,andanadditionalXOpulsewhenthe
Readpointerreachesthelastlocationofmemory.
DATA OUTPUTS (Q0-Q8) — Q0-Q8 are data outputs for 9-bit wide data.
Theseoutputsareinahigh-impedanceconditionwheneverRead(R)isinaHIGH
state.
SIGNAL DESCRIPTIONS
INPUTS:
DATA IN (D0–D8)
— Data inputs for 9-bit wide data.
CONTROLS:
RESET ( RS ) — Reset is accomplished whenever the Reset (RS) input is
takentoaLOWstate. Duringreset,bothinternalreadandwritepointersareset
tothefirstlocation.Aresetisrequiredafterpower-upbeforeawriteoperationcan
take place. Both the Read Enable (R) and Write Enable (W) inputs must
beintheHIGHstateduringthewindowshowninFigure2(i.e.tRSSbefore
the rising edge of RS) and should not change until tRSR after the rising
edge of RS.
WRITE ENABLE ( W ) — A write cycle is initiated on the falling edge of this
inputiftheFullFlag(FF)isnotset.Dataset-upandholdtimesmustbeadhered-
to,withrespecttotherisingedgeoftheWriteEnable(W).DataisstoredintheRAM
array sequentially and independently of any on-going read operation.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
theHalf-FullFlag(HF)willbesettoLOW,andwillremainsetuntilthedifference
betweenthewritepointerandreadpointerisless-thanorequaltoone-halfofthe
totalmemoryofthedevice.TheHalf-FullFlag(HF)isthenresetbytherisingedge
ofthereadoperation.
Topreventdataoverflow,theFullFlag(FF)willgoLOWonthefallingedge
ofthelastwritesignal,whichinhibitsfurtherwriteoperations. Uponthecompletion
of a valid read operation, the Full Flag (FF) will go HIGH after tRFF, allowing a
newvalidwritetobegin.WhentheFIFOisfull,theinternalwritepointerisblocked
from W,soexternalchangesinW willnotaffecttheFIFOwhenitisfull.
READENABLE(R)—A readcycleisinitiatedonthefallingedgeoftheRead
Enable (R), provided the Empty Flag (EF) is not set. The data is accessed on
aFirst-In/First-Outbasis,independentofanyongoingwriteoperations. AfterRead
Enable (R) goes HIGH, the Data Outputs (Q0 through Q8) will return to a high-
impedanceconditionuntilthenextReadoperation. Whenallthedatahasbeen
read from the FIFO, the Empty Flag (EF) will go LOW, allowing the “final” read
cyclebutinhibitingfurtherreadoperations,withthedataoutputsremaininginahigh-
impedancestate.Onceavalidwriteoperationhasbeenaccomplished,theEmpty
Flag (EF) will go HIGH after tWEF and a valid Read can then begin. When the
FIFOisempty,theinternalreadpointerisblockedfromRsoexternalchangeswill
notaffecttheFIFOwhenitisempty.
FIRST LOAD/RETRANSMIT ( FL/RT
) — This is a dual-purpose input. In
theDepthExpansionMode,thispinisgroundedtoindicatethatitisthefirstdevice



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