ADL5501AKSZ-R2 datasheet(15/28 Pages) AD

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ADL5501

Rev. 0 | Page 15 of 28

40µs/DIV

400mV rms RF INPUT

250mV rms

160mV rms

70mV rms

ENBL

ADL5501

VPOS

FLTR

RFIN

VRMS

ENBL

COMM

POWER

SUPPLY

RF SIGNAL

GENERATOR

PULSE

GENERATOR

100pF

0.1µF

CFLTR

OSCILLOSCOPE

FET PROBE

ROUT

COUT

AD811

732Ω

50Ω

Figure 37. Output Response to Enable Gating at Various RF Input Levels,

Supply 3 V, Frequency 900 MHz, CFLTR = 1 nF, COUT = Open, ROUT = Open

Figure 34. Hardware Configuration for Output Response to

Enable Gating Measurements

100µs/DIV

400mV rms RF INPUT

250mV rms

160mV rms

70mV rms

ENBL

40µs/DIV

400mV rms RF INPUT

250mV rms

160mV rms

70mV rms

ENBL

Figure 38. Output Response to Enable Gating at Various RF Input Levels,

Supply 3 V, Frequency 900 MHz, CFLTR = Open, COUT = 0.1 μF, ROUT = 1 kΩ

Figure 35. Output Response to Enable Gating at Various RF Input Levels,

Supply 3 V, Frequency 900 MHz, CFLTR = Open, COUT = Open, ROUT = Open

100

–20

500

1000

1500

2000

2500

3000

3500

4000

FREQUENCY (MHz)

500

1000

1500

2000

2500

3000

3500

4000

FREQUENCY (MHz)

Figure 39. Intercept vs. Frequency, Supply 5 V

Figure 36. Conversion Gain vs. Frequency, Supply 5 V

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