Nexperia

74ALVC02

Quad 2-input NOR gate

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74ALVC02D

-40 °C to +85 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74ALVC02PW -40 °C to +85 °C

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74ALVC02BQ -40 °C to +85 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

SOT762-1

4. Functional diagram

mna216

1A

1B

1Y

3

2

1

2A

2B

2Y

6

5

4

3A

3B

3Y

9

8

10

4A

4B

4Y

12

11

13

Fig. 1. Logic symbol

001aah084

2

1

3

5

4

≥1

6

≥1

8

10

≥1

9

11

13

≥1

12

Fig. 2. IEC logic symbol

mna215

A

B

Y

Fig. 3. Logic diagram (one gate)

5. Pinning information

5.1. Pinning

74ALVC02

1Y

VCC

1A

4Y

1B

4B

2Y

4A

2A

3Y

2B

3B

GND

3A

aaa-027353

1

2

3

4

5

6

7

8

10

9

12

11

14

13

Fig. 4. Pin configuration SOT108-1 (SO14)

74ALVC02

1Y

VCC

1A

4Y

1B

4B

2Y

4A

2A

3Y

2B

3B

GND

3A

aaa-027354

1

2

3

4

5

6

7

8

10

9

12

11

14

13

Fig. 5. Pin configuration SOT402-1 (TSSOP14)

74ALVC02

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 5 — 27 July 2021

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