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ICS671-01 bảng dữ liệu(PDF) 4 Page - Renesas Technology Corp |
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ICS671-01 bảng dữ liệu(HTML) 4 Page - Renesas Technology Corp |
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4 / 7 page ![]() ICS671-01 ZERO DELAY LOW SKEW BUFFER AND MULTIPLIER ZDB AND MULTIPLIER IDT™ / ICS™ ZERO DELAY LOW SKEW BUFFER AND MULTIPLIER 4 ICS671-01 REV F 051310 AC Electrical Characteristics VDD = 3.3V ±10%, Ambient Temperature 0 to +70 ° C, CLOAD at CLK = 15 pF, unless stated otherwise Note 1: With CLKIN = 20 MHz, FBIN to CLK8, all outputs at 40 MHz. Note 2:With CLKIN = 80 MHz, FBIN to CLK8, all outputs at 160 MHz. Note 3: These specs do not apply to mode 01. Thermal Characteristics (16 pin SOIC) Ouput Low Voltage VOL IOL = 25mA 0.4 V Output High Voltage, CMOS level VOH IOH = -8 mA VDD-0.4 V Operating Supply Current IDD No Load, S1 = 1, S0 = 0, Note 1 25 mA No Load, S1 = 1, S0 =0 Note 2 Power Down Supply Current IDDPD CLKIN = 0, S0 = 0, S1 = 0 500 µA Short Circuit Current IOS Each output ±50 mA Input Capacitance CIN S0, S1, FBIN 7 pF Parameter Symbol Conditions Min. Typ. Max. Units Parameter Symbol Conditions Min. Typ. Max. Units Input Clock Frequency fIN See table on page 2 5 80 MHz Output Clock Frequency See table on page 2 5 160 MHz Output Rise Time tOR 0.8 to 2.0V, CL=30 pF 1.5 ns Output Fall Time tOF 2.0 to 0.8V, CL=30 pF 1.5 ns Output Clock Duty Cycle tDC measured at VDD/2 40 50 60 % Device to Device Skew rising edges at VDD/2, Note 3 700 ps Output to Output Skew rising edges at VDD/2, Note 3 250 ps Input to Output Skew rising edges at VDD/2, FBIN to CLK8 ±350 ps Maximum Absolute JItter 15 pF 300 ps Cycle to Cycle Jitter 30 pF loads 500 ps PLL Lock Time Note 3 1.0 ms Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θJA Still air 120 ° C/W θJA 1 m/s air flow 115 ° C/W θJA 3 m/s air flow 105 ° C/W Thermal Resistance Junction to Case θJC 58 ° C/W |
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