MMPF0100Z datasheet(25/128 Pages) NXP

25 / 128 page

NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.3.2.1.1

External components

6.3.2.1.2

VREFDDR specifications

Table 19. Register VREFDDCRTL - ADDR 0x6A

Name

Bit #

R/W

Default

Description

UNUSED

3:0

–

0x00

unused

VREFDDREN

R/W

0x00

Enable or disables VREFDDR output voltage

0 = VREFDDR disabled

1 = VREFDDR enabled

UNUSED

7:5

–

0x00

unused

Table 20. VREFDDR external components (30)

Capacitor

Capacitance (

F)

VINREFDDR(31) to VHALF

0.1

VHALF to GND

0.1

VREFDDR

1.0

Notes

30.

Use X5R or X7R capacitors.

31.

VINREFDDR to GND, 1.0

F minimum capacitance is provided by buck regulator output.

Table 21. VREFDDR electrical characteristics

PF0100Z TA = -40 °C to 85 °C, PF0100AZ TA = -40 °C to 105 °C, VIN = 3.6 V, IREFDDR = 0.0 mA, VINREFDDR = 1.5 V and typical external

component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, IREFDDR = 0.0 mA, VINREFDDR = 1.5 V, and

25 °C, unless otherwise noted.

Symbol

Parameter

Min.

Typ.

Max.

Unit

Notes

VREFDDR

VINREFDDR

Operating input voltage range

1.2

–

1.8

IREFDDR

Operating load current range

0.0

–

IREFDDRLIM

Current limit

IREFDDR when VREFDDR is forced to VINREFDDR/4

10.5

IREFDDRQ

Quiescent current

–

8.0

–

A

(32)

Active Mode – DC

VREFDDR

Output voltage

1.2 V < VINREFDDR < 1.8 V

0.0 mA < IREFDDR < 10 mA

–

VINREFDDR/

–V

VREFDDRTOL

Output voltage tolerance

1.2 V < VINREFDDR < 1.8 V

0.6 mA

IREFDDR 10 mA

TA = -40 °C to 85 °C

TA = -40 °C to 105 °C (PF0100AZ only)

–1.0

-1.2

–

1.0

1.2

VREFDDRLOR

Load regulation

1.0 mA < IREFDDR < 10 mA

1.2 V < VINREFDDR < 1.8 V

–0.40–

mV/mA

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