P89LPC9381FDH datasheet(39/60 Pages) PHILIPS

39 / 60 page

P89LPC9381_1

Product data sheet

Rev. 01 — 8 September 2006

39 of 60

Philips Semiconductors

P89LPC9381

8-bit microcontroller with 10-bit ADC

7.26.9 Power-on reset code execution

The P89LPC9381 contains two special ﬂash elements: the Boot Vector and the Boot

Status Bit. Following reset, the P89LPC9381 examines the contents of the Boot Status

Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which

is the normal start address of the user’s application code. When the Boot Status Bit is set

to a value other than zero, the contents of the Boot Vector is used as the high byte of the

execution address and the low byte is set to 00H.

Table 8 shows the factory default Boot Vector setting for this device. A factory-provided

bootloader is pre-programmed into the address space indicated and uses the indicated

boot loader entry point to perform ISP functions. This code can be erased by the user.

Users who wish to use this loader should take precautions to avoid erasing the

1 kB sector that contains this boot loader. Instead, the page erase function can be

used to erase the ﬁrst eight 64 B pages located in this sector. A custom bootloader

can be written with the Boot Vector set to the custom boot loader, if desired.

7.26.10 Hardware activation of the bootloader

The bootloader can also be executed by forcing the device into ISP mode during a

power-on sequence (see the P89LPC9381

User’s Manual for speciﬁc information). This

has the same effect as having a non-zero status byte. This allows an application to be built

that will normally execute user code but can be manually forced into ISP operation. If the

factory default setting for the Boot Vector (0FH) is changed, it will no longer point to the

factory pre-programmed ISP bootloader code. After programming the ﬂash, the status

byte should be programmed to zero in order to allow execution of the user’s application

code beginning at address 0000H.

7.27 User conﬁguration bytes

Some user-conﬁgurable features of the P89LPC9381 must be deﬁned at power-up and

therefore cannot be set by the program after start of execution. These features are

conﬁgured through the use of the ﬂash byte UCFG1. Please see the P89LPC9381

User’s

Manual for additional details.

7.28 User sector security bytes

There are four User Sector Security Bytes on the P89LPC9381. Each byte corresponds to

one sector. Please see the P89LPC9381

User’s Manual for additional details.

ADC

8.1 General description

The P89LPC9381 has a 10-bit, 8-channel multiplexed successive approximation

analog-to-digital converter module. A block diagram of the ADC is shown in Figure 15.

The ADC consists of an 8-input multiplexer which feeds a sample-and-hold circuit

Table 8.

Default Boot Vector values and ISP entry points

Device

Default

boot vector

Default

bootloader

entry point

Default bootloader

code range

1 kB sector

range

P89LPC9381

0FH

0F00H

0E00H to 0FFFH

0C00H to 0FFFH

P89LPC9381FDH bảng dữ liệu(PDF) 39 Page - NXP Semiconductors

P89LPC9381FDH bảng dữ liệu(HTML) 39 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

bảng dữ liệu tải về

Link URL