SP3080EENSLASHTR datasheet(17/21 Pages) SIPEX

17 / 21 page

Rev N 9/15/2006

SP3080E Advanced RS485 Transceiver

DESCRIPTION

DETAILED DESCRIPTION

SP3080E is an advanced RS-485/RS-422 trans-

ceiver. It contains one driver and one receiver.

The device features fail-safe circuitry that guar-

antees a logic-high receiver output when the re-

ceiver inputs are open or shorted, or when they

are connected to a terminated transmission line

with all drivers disabled. SP3080E also feature

a hot-swap capability allowing live insertion

without error data transfer.

The SP3080E features reduced slew-rate driv-

ers that minimize EMI and reduce reﬂections

caused by improperly terminated cables, allow-

ing error-free data transmission up to 115kbps.

The SP3080E is a full duplex transceiver.

The device operates from a single 5.0V sup-

ply. Driver is output short-circuit current lim-

ited. Thermal-shutdown circuitry protects driver

against excessive power dissipation. When ac-

tivated, the thermal-shutdown circuitry places

the driver outputs into a high-impedance state.

RECEIVER INPUT FILTERING

SP3080E receiver incorporates input ﬁltering

in addition to input hysteresis. This ﬁltering en-

hances noise immunity with differential signals

that have very slow rise and fall times. Receiver

propagation delay increases due to this ﬁlter-

ing.

ADVANCED FAIL SAFE

Ordinary RS485 differential receivers will be in

an indeterminate state whenever A - B is less

than ±200mV. This situation can occur when-

ever the data bus is not being actively driven.

The Advanced Failsafe feature of the SP3080E

guarantees a logic-high receiver output if the

receiver’s differential inputs are shorted, open-

circuit, or if they are shunted by a termination

resistor.

The receiver thresholds of the SP3080E is very

precise and offset by at least a 40mV noise

margin from ground. This results in a logic-high

receiver output at zero volts input differential

while maintaining compliance with the EIA/TIA-

485 standard of ±200mV.

HOT-SWAP CAPABILITY

When a micro-processor or other logic device

undergoes its power-up sequence its logic-

outputs are typically at high impedance. In this

state they are unable to drive the DE and RE sig-

nals to a deﬁned logic level. During this period,

noise, parasitic coupling or leakage from other

devices could cause standard CMOS enable in-

puts to drift to an incorrect logic level.

If circuit boards are inserted into an energized

backplane (commonly called “live insertion” or

“hot-swap”) power may be suddenly applied to

all circuits. Without the hot-swap capability, this

situation could improperly enable the transceiv-

er’s driver or receiver, driving invalid data onto

shared busses and possibly causing driver con-

tention or device damage.

The SP3080E contains a special poweron-

reset circuit that holds DE low and RE high for

approximately 10 microseconds. After this ini-

tial power-up sequence the hot-swap circuit

becomes transparent, allowing for normal, un-

skewed enable and disable timings.

±15KV ESD PROTECTION

ESD-protection structures are incorporated on

all pins to protect against electrostatic discharg-

es encountered during handling and assembly.

The driver output and receiver inputs of the

SP3080E have extra protection against static

electricity. Sipex uses state of the art structures

to protect these pins against ESD of ±15kV

without damage. The ESD structures withstand

high ESD in all states: normal operation, shut-

down, and powered down. After an ESD event,

the SP3080E keeps working without latch-up or

damage.

ESD protection can be tested in various ways.

The transmitter outputs and receiver inputs of

the SP3080E is characterized for protection to

the following limits:

±15kV using the Human Body Model

±8kV using the Contact Discharge

method speciﬁed in IEC 1000-4-2

±15kV Air-gap

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