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SP6136 bảng dữ liệu(PDF) 9 Page - Sipex Corporation |
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SP6136 bảng dữ liệu(HTML) 9 Page - Sipex Corporation |
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9 / 18 page ![]() 9 Oct 3-06 Rev L SP636 Synchronous Buck Controller © 2006 Sipex Corporation 20VratedMOSFETissufficient.Forconvert- ers with 0-5Vin, as in the above example, select a 30V MOSFET. The calculation of Rds(on) for Top and Bottom MOSFETs is interrelated and can be done using the following procedure: ) Calculate the maximum permissible power dissipation P(dissipation) based on required efficiency. The converter in the above example should deliver an output power Pout = 3.3V•0A = 33W. For a target efficiency of 94%, input power Pin is given by Pin = Pout/0.94 = 35.W. Maximum al- lowable power dissipation is then: P(dissipation) = Pin – Pout = 2. W 2) Calculate the total power dissipation in top and bottom MOSFETs P(mosFEt) by sub- tracting inductor losses from P(dissipation) calculated in step . To simplify, disregard core losses; then PL = I 2rms • DCR • .4, where .4 accounts for the increase in DCR at operating temperature. For the above example PL = 0.63W. Then: P(mosFEt) = 2.W – 0.63W = .47W. 3) Calculate Rds(on) of the bottom MOSFET by allocating 40% of calculated losses to it. 40% dissipation allocation reflects the fact that the the top MOSFET has essentially no switching loss. Then P(bottom) = 0.4X.47W = 0.59W. Rds(on) = P/(I 2rms • .5) where Irms = Iout • {-(Vout/Vin)}0.5 and .5 accounts for the increase in Rds(on) at the operating temperature. Then: Rds (on) = P [{I2out • (-Vout/Vin)} • .5] = 5.4 W. 4) Allocate 60% of the calculated losses to the top MOSFET, P(top) = 0.6X.47 = 0.88W. Assume conduction losses equal to switching losses, then P = 0.5X0.88W = 0.44W. Since it operates at the duty cycle of D=Vin/Vout ; then: Rds(on) = P [I 2 out • (Vout/Vin) • .5 ] = 0.7 W. Gate-to-drain charge Qgd for the top MOS- FET needs to be specified. A simplified expression for switching losses is: Ps = Iout • Vin • f • {Vin + Iout } ...................(3) dv/dt di/dt where dv/dt and di/dt are the rates at which voltage and current transition across the top MOSFET respectively, and f is the switching frequency. Voltage switching time(Vin/d v/dt) is related to Qgd: (Vin /d v/dt) = Qgd/Ig............................... (4) where Ig is Current charging the gate-to-drain capacitance. It can be calculated from: Ig = (VdrivE-VgatE)/RdrivE......................(5) where VdrivE is the drive voltage of the SP636 top driver minus the drop across the boost diode (approximately 4.5V); VgatE is the top MOSFET’s gate voltage correspond- ing to Iout (assume 2.5V) and RdrivE is the internal resistance of the SP636 top driver (assume 2 Waverageforturn-onandturn-off). Substituting these values in equation (5) we get Ig = A. Substituting for Ig in equation (4), we get (Vin /dv/dt) = Qgd. Substituting for (Vin /dv/dt) in equation (3) we have: Ps = Iout • Vin • f • {Qgd + (Iout / di/dt)} Solving for Qgd we get: Qgd = { Ps _ Iout } .............. (6) Iout • Vin • f di/dt Di/dt is usually limited by parasitic DC-Loop Inductance (Lp) according to di/dt = Vin/Lp. APPLICATION INFORMATION |
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