công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

LC723481W bảng dữ liệu(PDF) 2 Page - Sanyo Semicon Device

tên linh kiện LC723481W
Giải thích chi tiết về linh kiện  Low-Voltage ETR-Controller
PDF  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  SANYO [Sanyo Semicon Device]
Trang chủ  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC723481W bảng dữ liệu(HTML) 2 Page - Sanyo Semicon Device

  LC723481W Datasheet HTML 1Page - Sanyo Semicon Device LC723481W Datasheet HTML 2Page - Sanyo Semicon Device LC723481W Datasheet HTML 3Page - Sanyo Semicon Device LC723481W Datasheet HTML 4Page - Sanyo Semicon Device LC723481W Datasheet HTML 5Page - Sanyo Semicon Device LC723481W Datasheet HTML 6Page - Sanyo Semicon Device LC723481W Datasheet HTML 7Page - Sanyo Semicon Device LC723481W Datasheet HTML 8Page - Sanyo Semicon Device LC723481W Datasheet HTML 9Page - Sanyo Semicon Device Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 15 page
background image
No. 7253-2/15
LC723481W/2W/3W
Continued from preceding page.
I/O ports: 16 pins (Of these 8 can be switched over to
function as LCD ports as a mask options.)
• PLL: Dead band control is supported. (Four types)
Reference frequencies: 1, 3, 3.125, 5, 6.25, 12.5,
and 25 kHz
• Input frequencies: FM band: 10 to 250 MHz
AM band: 0.5 to 40 MHz
• Input sensitivity:
FM band: 35 mVrms (50 mVrms at 130 MHz or higher
frequency)
AM band: 35 mVrms
• IF counting: Using the HCTR input pin for 0.4 to
12 MHz signals
• External reset input: During CPU and PLL operations,
instruction execution is started from
location 0.
• Built-in power-on reset circuit:
The CPU starts execution from location 0 when power is
first applied.
• Halt mode: The controller-operating clock is stopped.
• Backup mode: The crystal oscillator is stopped.
• Static power-on function: Backup state is cleared with
the PF port
• Beep tone: 1.5625 and 3.125 kHz
• Built-in low-pass filter amplifier: This circuit obviates
the need for an external amplifier for the PLL circuit and
contributes to reduced end product costs.
• Built-in DC/DC converter:
Cost reduced in tuner-use power supply circuit
• Memory retention voltage: 0.9 V at least
• VDD voltage
— PLL: 1.8 to 3.6 V
— CPU: 1.4 to 3.6 V
— ADC: 1.6 to 3.6 V
• Optional function switches:
— PH0 to PH3/S13 to S16
— PG0 to PG3/S17 to S20
— PG0 to PG3 (open-drain output/general-purpose
output)
— PH0 to PH3 (open-drain output/general-purpose
output)
— FM DC/DC clock (75 kHz or 1/256 times the local
FM oscillator frequency)
— AM DC/DC clock (1/2, 1/4, 1/8, or 1/16 times the
AM local oscillator frequency)
• Package: SQFP-64 (0.5-mm pitch)
Pin Assignment
XOUT
TEST2
PA3
PB3
PC3
PD3
PD2
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
COM4
COM3
COM2
COM1
PC2
PC1
PC0
PB2
PB1
PB0
PA2
PA1
PA0
1
48
2
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
3
4
5
6
7
8
9
10
11
12
13
14
15
16
General-purpose
inputs
General-purpose unbalanced outputs
Open drain outputs
General-purpose I/O
General-
purpose
I/O



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com