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ISL73847SEHF/PROTO bảng dữ liệu(PDF) 27 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  Radiation Hardened Single/Dual Phase Current Mode PWM Controller
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ISL73847SEHF/PROTO bảng dữ liệu(HTML) 27 Page - Renesas Technology Corp

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R34DS0022EU0102 Rev.1.02
Page 27
Feb 15, 2023
ISL73847SEH Datasheet
5.15 Fault Handling
5.15.1
Cycle-by-Cycle Current Limit
The current flowing through the inductor is monitored through the current-sense inputs using a sense resistor or
DCR sensing. When the input reaches the current limit threshold (VPCL), the PWM pulse is terminated to limit the
peak current. A single cycle-by-cycle current limit event does not trigger hiccup but if there are four current limit
events in an eight clock cycle window, the ISL73847SEH enters hiccup.
5.15.2
Inductor Peak Overcurrent Protection
If the output current increases even after triggering the cycle-by-cycle current limit, the ISL73847SEH has a
second overcurrent protection (VPOC and VNOC). If triggered, it drives the PWM outputs to mid-level (tri-state the
power stage) and enters hiccup. If the initial fault continues to persist or another fault occurs during the next
soft-start, the cycle repeats indefinitely and stays in hiccup. The overcurrent protection protects against both
positive and negative overcurrent conditions.
5.15.3
Overvoltage and Undervoltage Fault
The ISL73847SEH has overvoltage and undervoltage protection that is triggered when V(FB, OV) or V(FB, UV) are
exceeded. If the V(FB, OV) or V(FB, UV) levels are reached, the part enters hiccup.
5.15.4
FLT Pin
The FLT pin is a bi-directional communication pin between the ISL73847SEH controller and the ISL73041SEH
driver. On the ISL73847SEH, the FLT pin is low and is an I/O when the part is not ready (during startup) or when it
encounters a fault. The ISL73041SEH uses this pin to communicate if it is not ready to accept input or
encountered a fault on its end. In either case, if the FLT pin is pulled low by the ISL73041SEH, the ISL73847SEH
tri-states the output (mid level) and enters hiccup. The FLT pin is an input while switching (during and after
startup).
5.15.5
Oscillator and Sync Input Fault
If the FS pin is inadvertently shorted to ground, this causes a fault in the controller and switching would be
inhibited.
The ISL73847SEH has the ability to synchronize to an external frequency. If the external clock is not present or if
the internal clock frequency is not less than 15% of the required external clock frequency, the part reverts to the
internal oscillator and continues operation. When the external sync input returns or if the internal clock frequency
is less than 15% of the required external clock frequency, the ISL73847SEH immediately switches back to the
external clock, as shown in Figure 46.
Figure 46. Switching between Internal Oscillator and External Oscillator on SYNC-I
(External clock frequency changed from 1MHz to 1.15MHz)



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