ISL70005SEHFSLASHPROTO datasheet(27/46 Pages) RENESAS

27 / 46 page

ISL70005SEH, ISL73005SEH

4. Functional Description

R34DS0008EU0103 Rev.1.03

Page 27 of 45

Jul 28, 2022

does not complete soft-start. When the B_SS pin voltage reaches 1.6V, the soft-start capacitor is internally

discharged to 0V and begins a new soft-start cycle with no switching on B_LXx. This condition repeats until the

pre-bias output voltage is reduced below the target regulation voltage.

4.1.4

Switching Frequency with B_RT and B_SYNC

The buck regulator PWM switching frequency is set through the internal oscillator with an adjustable range of

100kHz to 1MHz. An external termination resistor, RT, from the B_RT pin to B_GND sets the oscillator frequency.

See “Switching Frequency Selection and External Sync for Buck Regulator” on page 31 for more information on

setting the RT resistor.

The switching frequency can also be synchronized to an external clock through the B_SYNC pin. During soft-start

the clock at B_SYNC is ignored and the PWM controller uses the internal oscillator for switching until the soft-start

voltage is above the internal 600mV reference voltage where it synchronizes to B_SYNC. The synchronization

frequency range is 100kHz to 1MHz. If external synchronization is not used, tie B_SYNC to GND.

4.1.5

Buck Power-Good

The B_PG power-good indicator is an open-drain logic output. On completion of soft-start and without a fault

condition on the buck regulator, the B_PG pin is high impedance. An external pull-up resistor to B_VCC is used

for logic high indicating the buck output is operating in regulation. The recommended range for the pull-up resistor

is 10kΩ to 100kΩ. Before soft-start completes or in a fault condition, the B_PG pin is actively pulled low to indicate

buck output is not operating in regulation. To mitigate SEE, bypass the B_PG pin to B_GND with a 1nF ceramic

capacitor.

4.1.6

Buck Integrated Power MOSFETs

The buck regulator integrates two synchronous operation MOSFETs for the power stage. The high-side MOSFET

is a PMOS and the low-side MOSFET is an NMOS. The MOSFETs are optimized for low rDS(ON) to provide

excellent efficiency over the 3A load current operating range.

4.1.7

Buck Error Amplifier Output

The B_COMP pin is the output of the error amplifier. The voltage on B_COMP determines the duty cycle at

B_LXx. For voltage mode control, a Type III compensation network must be connected between B_FB and

B_COMP to stabilize the feedback loop. See “Buck Feedback Compensation Design” on page 36 for the design

of the Type III compensator. The B_COMP pin analog range is from 100mV to 0.4*B_VCC that correlates to the

B_LXx duty cycle from minimum on-time to minimum off-time.

4.1.8

Buck Overcurrent Limiting

The buck regulator integrates cycle-by-cycle output overcurrent limiting. Peak inductor current is sensed on the

integrated high-side PMOS FET. If the high-side switch current exceeds the overcurrent threshold (5.3A typical),

the PMOS turns off and the low-side NMOS FET is turned on for the remainder of the switching cycle. After four

consecutive detections of cycle-by-cycle current limiting, the Buck regulator enters an overcurrent fault protection

mode as described in Buck Fault Protection. The minimum response time from the high-side PMOS turn-on to

overcurrent detection is determined by the B_LX minimum on-time specified in the Electrical Specification table

on page 10. The response time from overcurrent detection to the high-side PMOS turn-off is approximately 60ns.

See Figure 35 and Figure 36.

4.1.9

Buck Fault Protection

The buck regulator integrates output overvoltage detection, output undervoltage protection, overcurrent protection

and over-temperature protection. The fault response for output overvoltage only pulls the B_PG pin low to indicate

an overvoltage condition. After recovery from an overvoltage, the B_PG pin is released. The fault response for an

undervoltage or overcurrent condition pulls the B_PG pin low and starts a hiccup mode, after which a time delay

causes the controller to start a soft-start cycle. The hiccup mode continues indefinitely until the fault condition

recovers. If the soft-start completes with no fault condition, the B_PG pin is released. The fault response for an

over-temperature condition pulls the B_PG and B_SS pins low and disables switching on B_LXx. After recovery

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