ISL8200MM

FN7690 Rev 2.00

Page 9 of 24

Mar 15, 2013

OVERVOLTAGE PROTECTION (Note 6)

OV Latching Up Trip Point

EN = UGATE = LATCH Low, LGATE = High

(Note 8)

120

(Note 8)

%

OV Non-Latching Up Trip Point

EN = Low, UGATE = Low, LGATE = High

113

%

LGATE Release Trip Point

EN = Low/HIGH, UGATE = Low, LGATE = Low

87

%

OVER-TEMPERATURE PROTECTION (Note 6)

Over-Temperature Trip

150

°C

Over-Temperature Release Threshold

125

°C

INTERNAL COMPONENT VALUES

Internal Resistor Between PVCC and

VCC pin

RCC

5

Ω

Internal Resistor Between PHASE and

OCSET Pins

RSEN1

2.2k

Ω

Internal Resistor Between FSYNC_IN

and SGND Pins

RFS

59k

Ω

Internal Resistor Between PGOOD and

VCC Pins

RPG

10k

Ω

Internal Resistor Between CLKOUT and

VCC Pins

RCLK

10k

Ω

Internal Resistor Between PH_CNTRL

and VCC Pins

RPHC

10k

Ω

Internal Resistor Between VOUT_SET

and VSEN_REM- pin

ROS1

2.2k

Ω

5. Parameters with TYP limits are not production tested, unless otherwise specified.

6. Parameters are 100% tested for internal IC prior to module assembly.

7. Limits should be considered typical and are not production tested.

8. Refer to Defense Logistics Agency (DLA) drawing number V62/10608 for min/max parameters.

Electrical Specifications (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

(Note 5)

MAX

UNITS

FIGURE 5. TEST CIRCUIT FOR ALL PERFORMANCE AND DERATING GRAPHS