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MC44BC375U/J/T bảng dữ liệu(PDF) 17 Page - NXP Semiconductors |
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MC44BC375U/J/T bảng dữ liệu(HTML) 17 Page - NXP Semiconductors |
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17 / 20 page ![]() Markings and Case Diagrams MC44BC375/U/J/T Technical Data 15.2 Packaging Instructions Tape and reel packaging per 12MRH00360A with the following conditions applicable for Dual In-Line SOP (SOIC) package. 15.3 Marking Instructions In accordance with 12MRH00191A internal specification applied for Dual in-line SO package. Component Orientation: Arrange parts with the pin 1 side closest to the tape's round sprocket holes on the tape's trailing edge. •1st line: MC44BC375U for MC44BC375UD device MC44BC375J for MC44BC375JD device MC44BC375T for MC44BC375TD device (Part number coded on 10 digits) • 2nd line: Assembly site code AW (2 digits) followed by the wafer lot code L (1 digit), year Y (1 digit) and work week WW (2 digits) Bar marked part way accross Pin 1 end of package. Bar width 10 to 20 mils, length to be at least four times Bar width. Bar placement may extend across chamfer and dimple areas. Pin 1 Dot or Dimple MC44BC375x Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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