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ISL6324A bảng dữ liệu(PDF) 13 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane and PVI
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ISL6324A Hybrid SVI/PVI with I2C
FN6880 Rev 1.00
Page 13 of 39
May 14, 2010
The PWM signals command the MOSFET driver to turn on/off
the channel MOSFETs.
For 4-channel operation, the channel firing order is 1-2-3-4:
PWM3 pulse happens 1/4 of a cycle after PWM4, PWM2
output follows another 1/4 of a cycle after PWM3, and PWM1
delays another 1/4 of a cycle after PWM2. For 3-channel
operation, the channel firing order is 1-2-3.
Connecting ISEN4- to VCC selects three channel operation
and the pulse times are spaced in 1/3 cycle increments. If
ISEN3- is also connected to VCC, 2-Channel operation is
selected and the PWM2 pulse happens 1/2 of a cycle after
PWM1 pulse. If ISEN2- is also connected to VCC, 1-Channel
operation is selected.
Continuous Current Sampling
In order to realize proper current-balance, the currents in each
channel are sampled continuously every switching cycle.
During this time, the current-sense amplifier uses the ISEN
inputs to reproduce a signal proportional to the inductor
current, IL. This sensed current, ISEN, is simply a scaled
version of the inductor current.
The ISL6324A supports Inductor DCR current sensing to
continuously sample each channel’s current for channel-current
balance. The internal circuitry, shown in Figure 6 represents
Channel N of an N-Channel converter. This circuitry is repeated
for each channel in the converter, but may not be active
depending on how many channels are operating.
Inductor windings have a characteristic distributed resistance
or DCR (Direct Current Resistance). For simplicity, the inductor
DCR is considered as a separate lumped quantity, as shown in
Figure 6. The channel current ILn, flowing through the inductor,
passes through the DCR. Equation 5 shows the S-domain
equivalent voltage, VL, across the inductor.
A simple R-C network across the inductor (R1, R2 and C)
extracts the DCR voltage, as shown in Figure 6. The voltage
across the sense capacitor, VC, can be shown to be
proportional to the channel current ILn, shown in Equation 6.
Where:
If the R-C network components are selected such that the RC
time constant matches the inductor L/DCR time constant (see
Equation 8), then VC is equal to the voltage drop across the
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
The capacitor voltage VC, is then replicated across the effective
internal sense resistor, RISEN. This develops a current through
RISEN which is proportional to the inductor current. This
current, ISEN, is continuously sensed and is then used by the
controller for load-line regulation, channel-current balancing,
and overcurrent detection and limiting. Equation 9 shows that
the proportion between the channel current, IL, and the sensed
FIGURE 4. CONTINUOUS CURRENT SAMPLING
TIME
PWM
IL
ISEN
SWITCHING PERIOD
VL s

IL
n
sL DCR
+

=
(EQ. 5)
(EQ. 6)
VC s

sL
DCR
------------- 1
+


s
R1 R2

R1 R2
+
------------------------ C

1
+



-------------------------------------------------------- KDCR IL
n

=
K
R2
R2 R1
+
---------------------
=
(EQ. 7)
FIGURE 5. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
In
ISENn-
ISL6323 INTERNAL CIRCUIT
VIN
UGATE(n)
DCR
L
INDUCTOR
R1
VOUT
COUT
VC(s)
C
IL
n
VL(s)
ISEN
R2
VC(s)
ISENn+
LGATE(n)
MOSFET
DRIVER
RSET
RSET
-
+
SAMPLE
RISEN
VCC
CSET
L
DCR
-------------
R1 R2
R1 R2
+
--------------------- C
=
(EQ. 8)



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