ICS844256DGI REVISION A AUGUST 5, 2010

9

©2010 Integrated Device Technology, Inc.

ICS844256DI Data Sheet

FEMTOCLOCK® CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

Parameter Measurement Information, continued

Offset Voltage Setup

Differential Output Voltage Setup

Application Information

Power Supply Filtering Technique

As in any high speed analog circuitry, the power supply pins are

vulnerable to random noise. To achieve optimum jitter performance,

power supply isolation is required. The ICS844256DI provides

separate power supplies to isolate any high switching noise from the

outputs to the internal PLL. VDD, VDDA and VDDO should be

individually connected to the power supply plane through vias, and

0.01µF bypass capacitors should be used for each pin. Figure 1

illustrates this for a generic VDD pin and also shows that VDDA

requires that an additional 10

Ω resistor along with a 10µF bypass

capacitor be connected to the VDDA pin.

Figure 1. Power Supply Filtering

out

out

LVDS

DC Input

➤

VOS/∆ VOS

V

DD

➤

100

out

out

LVDS

DC Input

VOD/∆ VOD

V

DD

VDD

VDDA

3.3V

10

Ω

10µF

.01µF

.01µF