công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

ICS810001I-21 bảng dữ liệu(PDF) 13 Page - Renesas Technology Corp

tên linh kiện ICS810001I-21
Giải thích chi tiết về linh kiện  FemtoClock® Dual VCXO Video PLL
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS810001I-21 bảng dữ liệu(HTML) 13 Page - Renesas Technology Corp

Back Button ICS810001I-21 Datasheet HTML 9Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 10Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 11Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 12Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 13Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 14Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 15Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 16Page - Renesas Technology Corp ICS810001I-21 Datasheet HTML 17Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 21 page
background image
ICS810001DKI-21 REVISION A MARCH 21, 2013
13
©2013 Integrated Device Technology, Inc.
ICS810001I-21 Data Sheet
FEMTOCLOCK® DUAL VCXO VIDEO PLL
Figure 2. ICS810001I-21 Schematic Example
U1
nBP0
5
nBP1
22
CLK_SEL
7
CLK1
8
CLK0
9
V0
10
V1
14
V2
15
V3
16
MR
12
MF
13
OE
21
N1
23
N0
24
XTAL_SEL
26
XTAL_OUT1
27
XTAL_IN1
28
XTAL_OUT0
30
XTAL_IN0
31
LF1
1
LF0
2
ISET
3
Q
19
VDDA
17
VDDO
18
VDDX
32
XTAL_SEL
CLK_SEL
C4
TUNE
C3
TUNE
X1
27MHz (12pf )
C1-C2 load cap pair and C3-C4 load cap
pair values set by the center frequency
tune procedure for Xtal0 and Xtal 1
oscillators respectivly.
C2
TUNE
C1
TUNE
X2
26.973MHz (12pf )
C20
TBD
R23 TBD
R24
TBD
LF1
C21
TBD
C22
TBD
LF0
To Logic
Input
pins
VDD
VDD
RU2
Not Install
RU1
1K
Three pole option for
reduced low frequency
jitter with larger
feedback dividers.
Consult IDT Applications
for filter values.
RD2
1K
To Logic
Input
pins
RD1
Not Install
Logic Control Input Examples
Set Logic
Input to '1'
Set Logic
Input to '0'
Zo = 50
R3
33
LVCMOS Receiv er
nBP1
nBP0
V0
V1
V3
V2
N0
N1
MF
C5
0.1uF
3.3V
C6
10uF
FB1
BLM18BB221SN1
1
2
R5 10
C7
10uF
C8
0.1uF
C9
0.1uF
Place each 0.1uF bypass cap directly adjacent to
its corresponding VDD, VDDA, VDDX or VDDO pin.
VDD
R6 10
C10
10uF
VDDA
3.3V
Zo = 50 Ohm
R1
43
Ro
=7 Ohm
LVCMOS Driv er
3.3V
Zo = 50 Ohm
R2
43
Ro
=7 Ohm
LVCMOS Driv er
C11
0.1uF
C12
0.1uF
VDDX
C13
0.1uF
VDDO
C14
0.1uF
C15
0.1uF
3.3V
FB2
BLM18BB221SN1
1
2
C16
10uF
R7
150k
C19
0.22uF
LF1
C18
1000pF
LF0
R22
2.2k
OE
MR



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com