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DSPIC30F bảng dữ liệu(PDF) 216 Page - Microchip Technology |
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DSPIC30F bảng dữ liệu(HTML) 216 Page - Microchip Technology |
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216 / 248 page  dsPIC30F DS70083G-page 214 Preliminary 2004 Microchip Technology Inc. TABLE 23-31: I2C BUS DATA TIMING REQUIREMENTS (MASTER MODE) AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40 °C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic Min(1) Max Units Conditions IM10 T LO:SCL Clock Low Time 100 kHz mode T CY / 2 (BRG + 1) — ms — 400 kHz mode T CY / 2 (BRG + 1) — ms — 1 MHz mode(2) T CY / 2 (BRG + 1) — ms — IM11 T HI:SCL Clock High Time 100 kHz mode T CY / 2 (BRG + 1) — ms — 400 kHz mode T CY / 2 (BRG + 1) — ms — 1 MHz mode(2) T CY / 2 (BRG + 1) — ms — IM20 T F:SCL SDA and SCL Fall Time 100 kHz mode — 300 ns C B is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 C B 300 ns 1 MHz mode(2) —100 ns IM21 T R:SCL SDA and SCL Rise Time 100 kHz mode — 1000 ns C B is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 C B 300 ns 1 MHz mode(2) —300 ns IM25 T SU:DAT Data Input Setup Time 100 kHz mode 250 — ns — 400 kHz mode 100 — ns 1 MHz mode(2) TBD — ns IM26 T HD:DAT Data Input Hold Time 100 kHz mode 0 — ns — 400 kHz mode 0 0.9 ms 1 MHz mode(2) TBD — ns IM30 T SU:STA Start Condition Setup Time 100 kHz mode T CY / 2 (BRG + 1) — ms Only relevant for repeated Start condition 400 kHz mode T CY / 2 (BRG + 1) — ms 1 MHz mode(2) T CY / 2 (BRG + 1) — ms IM31 T HD:STA Start Condition Hold Time 100 kHz mode T CY / 2 (BRG + 1) — ms After this period the first clock pulse is generated 400 kHz mode T CY / 2 (BRG + 1) — ms 1 MHz mode(2) T CY / 2 (BRG + 1) — ms IM33 T SU:STO Stop Condition Setup Time 100 kHz mode T CY / 2 (BRG + 1) — ms — 400 kHz mode T CY / 2 (BRG + 1) — ms 1 MHz mode(2) T CY / 2 (BRG + 1) — ms IM34 T HD:STO Stop Condition 100 kHz mode T CY / 2 (BRG + 1) — ns — Hold Time 400 kHz mode T CY / 2 (BRG + 1) — ns 1 MHz mode(2) T CY / 2 (BRG + 1) — ns IM40 T AA:SCL Output Valid From Clock 100 kHz mode — 3500 ns — 400 kHz mode — 1000 ns — 1 MHz mode(2) — — ns — IM45 T BF:SDA Bus Free Time 100 kHz mode 4.7 — ms Time the bus must be free before a new transmission can start 400 kHz mode 1.3 — ms 1 MHz mode(2) TBD — ms IM50 C B Bus Capacitive Loading — 400 pF Note 1: BRG is the value of the I2C Baud Rate Generator. Refer to Section 21 “Inter-Integrated Circuit™ (I2C)” in the dsPIC30F Family Reference Manual. 2: Maximum pin capacitance = 10 pF for all I2C pins (for 1 MHz mode only). |
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