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M24C64P-FCU bảng dữ liệu(PDF) 13 Page - STMicroelectronics

tên linh kiện M24C64P-FCU
Giải thích chi tiết về linh kiện  64-Kbit serial I²C bus EEPROM 4 balls CSP
PDF  36 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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M24C64P-FCU bảng dữ liệu(HTML) 13 Page - STMicroelectronics

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M24C64P-FCU
Device operation
35
4.5
Device addressing
To start communication between the bus master and the slave device, the bus master must
initiate a Start condition. Following this, the bus master sends the device select code, shown
in Table 3 (on Serial Data (SDA), most significant bit first).
The 8th bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.
If a match occurs on the device select code, the corresponding device gives an
acknowledgment on Serial Data (SDA) during the 9th bit time.
If the device does not match the device select code, the device deselects itself from the bus,
and goes into Standby mode (therefore will not acknowledge the device select code).
Table 3. Device select code
Device type identifier(1)
1. The most significant bit, b7, is sent first.
Chip Enable address
RW
b7
b6
b5
b4
b3
b2
b1
b0
101
0011
RW



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