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PDTC143_114_124_144EQA_SER

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Product data sheet

Rev. 1 — 30 October 2015

4 of 21

Nexperia

PDTC143/114/124/144EQA series

50 V, 100 mA NPN resistor-equipped transistor

5.

Limiting values

[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint.

[2]

Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.

Table 6.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

VCBO

collector-base voltage

open emitter

-

50

V

VCEO

collector-emitter voltage

open base

-

50

V

VEBO

emitter-base voltage

-

10

V

VI

input voltage

PDTC143EQA

10

+30

V

PDTC114EQA

10

+40

V

PDTC124EQA

10

+40

V

PDTC144EQA

10

+40

V

IO

output current

-

100

mA

Ptot

total power dissipation

Tamb  25 C

[1] -280

mW

[2] -440

mW

Tj

junction temperature

-

150

C

Tamb

ambient temperature

55

+150

C

Tstg

storage temperature

65

+150

C

(1) FR4 PCB, 4-layer copper, standard footprint

(2) FR4 PCB, standard footprint

Fig 2.

Power derating curves

Tamb (°C)

-75

175

125

25

75

-25

aaa-017637

200

300

100

400

500

Ptot

(mW)

0

(1)

(2)